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Small and large signal S parameters

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John Larkin
Guest

Mon Feb 11, 2019 9:45 pm   



On Mon, 11 Feb 2019 20:16:04 +0100, Gerhard Hoffmann
<ghf_at_hoffmann-hochfrequenz.de> wrote:

Quote:
Am 11.02.19 um 19:06 schrieb John Larkin:
On Mon, 11 Feb 2019 10:30:48 -0500, Phil Hobbs
pcdhSpamMeSenseless_at_electrooptical.net> wrote:

On 2/11/19 6:44 AM, dakupoto_at_gmail.com wrote:
On Saturday, February 9, 2019 at 7:50:43 AM UTC-5, Phil Hobbs wrote:
On 2/9/19 6:36 AM, dakupoto_at_gmail.com wrote:
Could some electronics guru here help clarify the following.
Small signal S parameter amalysis is based on small signal
levels and a linearized cirucuit, with a DC operating point(bias) condition.
Large signal S parameter extends this scheme to high power
operating conditions of non-linear devices, where the
assumptions of small signal do not hold. Large signal
S parameter scheme is based on harmonic balance, which
involves analyzing the signals in the frequency domain.
i.e., Forier transforms.
Both schemes use a 2 port network, with the signal entering
at the inpit("from") port and coming out at the output("to")
port.
With these in mind, what about oscillators ? These are
one port networks, with a 2 port component (amplifier)
in it. So are large and small signal S parameters
applicable to oscillators ? Amplifiers are ripe for
large signal S parameters. For that matter, are the S
parameters quoted for older RF|micrwave transistors
small or karge signal S parameters ?

All hints/suggestions are welcome. Thanks in advance.


The first thing an oscillator has to do is to start up. It's initially
in the small signal condition, so the resonator + small signal S params
have to be unstable. So you can't ignore them.

Gerhard knows more RF than I do, so I'll let him carry on. ;)


It depends on the type of oscillator one is looking at.
A differential oscillator, by its very nature, does not need any transistor biasing, and so it does not matter
if the S parameters are used or not.
In addition, for the new breed of transistors(e/g/.
HFA3134 from Renessas Semiconductor) the datasheet DOES NOT list ANY S parameters. With a fT of 8 GHz, it
would work very well in the RF - microwave frequency range.


Sure. It has a super-detailed SPICE model for both the device and the
package parasitics, which is going to be more useful than S parameters.
You can generate S parameters from the model, but going the other way is
a lot more complicated.

Cheers

Phil Hobbs

Anything really interesting is going to be nonlinear, so may as well
Spice.

Unfortunately, nonlinear analysis in Spice is quite meagre.
You just get transient analysis and that's it. OK, add FFT from
the post processor.

For noise and frequency response analysis, the circuit is linearized
around the operating point, so it is small signal only by definition.

No nonlinear noise, no harmonic balance, no large signal frequency response.


I have added time-domain noise sources to LT Spice, but that's hack.
Spice is great for large-signal, time-domain stuff.

Quote:

I would not get very far determining the noise characteristics of my
chopper amplifiers. How could it linearize the circuit in the presence
of the chopp clock and the continuous switching?

How do I determine the noise level of an amplifier that is near
compression? That is the normal case in the sustaining amplifier
of an oscillator.

How could I see the jitter induced by noise or self heating?
Transient simulation is noise free.

How do I simulate a SRD frequency multiplier? Cannot. There
is no concept of carrier lifetime in Spice. No PIN diodes.
Oh, 1N4007 is a PIN diode. (the others in the series aren't)

cheers,
Gerhard



You had me scared for a minute there. A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.


Version 4
SHEET 1 880 680
WIRE 112 128 80 128
WIRE 176 128 112 128
WIRE 304 128 240 128
WIRE 320 128 304 128
WIRE 80 160 80 128
WIRE 320 176 320 128
WIRE 80 288 80 240
WIRE 320 288 320 256
FLAG 80 288 0
FLAG 320 288 0
FLAG 112 128 IN
FLAG 304 128 OUT
SYMBOL diode 176 144 R270
WINDOW 0 -42 34 VTop 2
WINDOW 3 -53 33 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 304 160 R0
WINDOW 0 56 36 Left 2
WINDOW 3 55 69 Left 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL voltage 80 144 R0
WINDOW 0 -146 33 Left 2
WINDOW 3 -264 72 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 10Meg)
TEXT 552 216 Left 2 !.tran 200n
TEXT 448 128 Left 2 ;1N914 Reverse Recovery
TEXT 512 176 Left 2 ;JL Feb 11 2019






--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Clifford Heath
Guest

Tue Feb 12, 2019 2:45 am   



On 12/2/19 7:08 am, John Larkin wrote:
Quote:
A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.


LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g. CML,
TinyLogic, that I'm already aware of)

Clifford Heath.

Gerhard Hoffmann
Guest

Tue Feb 12, 2019 2:45 am   



Am 11.02.19 um 21:08 schrieb John Larkin:

Quote:
I have added time-domain noise sources to LT Spice, but that's hack.
Spice is great for large-signal, time-domain stuff.


<
https://www.flickr.com/photos/137684711_at_N07/47014667932/in/album-72157662535945536/
Quote:



This is a dirty power supply. With it, you can check in a LTspice noise
simulation how much dirt you can tolerate on a supply voltage until it
starts to impair the performance of your amplifier.

The 60 Ohms resistor provides 1 nV / rt Hz. The VCVS amplifies
it to the required level and adds it to clean Vcc.
The 100 nV dc source is only there to avoid a simulator crash.

regards,
Gerhard

John Larkin
Guest

Tue Feb 12, 2019 6:45 am   



On Tue, 12 Feb 2019 12:11:23 +1100, Clifford Heath
<no.spam_at_please.net> wrote:

Quote:
On 12/2/19 7:08 am, John Larkin wrote:
A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.

LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g. CML,
TinyLogic, that I'm already aware of)

Clifford Heath.


Well, a CML gate or comparator is about perfect. The TEK SD24 used a
set of current-steering diodes. There's a patent somewhere.


One can build a fast but ratty TDR and use a fairly simple
deconvolution program to make it pretty.



--

John Larkin Highland Technology, Inc

lunatic fringe electronics

Phil Hobbs
Guest

Tue Feb 12, 2019 4:45 pm   



On 2/11/19 8:11 PM, Clifford Heath wrote:
Quote:
On 12/2/19 7:08 am, John Larkin wrote:
  A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.

LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g. CML,
TinyLogic, that I'm already aware of)

Clifford Heath.


ChesterW and I built a 100-ps-class single-diode TDR with a BOM of about
$2, using a pHEMT driven by a line receiver and a very small Schottky
diode, all done dead-bug style. 'Tweren't as clean as an SD-24, of
course, but it was surprisingly good for what it was.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

John Larkin
Guest

Tue Feb 12, 2019 4:45 pm   



On Tue, 12 Feb 2019 02:36:03 +0100, Gerhard Hoffmann
<ghf_at_hoffmann-hochfrequenz.de> wrote:

Quote:
Am 11.02.19 um 21:08 schrieb John Larkin:

I have added time-domain noise sources to LT Spice, but that's hack.
Spice is great for large-signal, time-domain stuff.



https://www.flickr.com/photos/137684711_at_N07/47014667932/in/album-72157662535945536/



This is a dirty power supply. With it, you can check in a LTspice noise
simulation how much dirt you can tolerate on a supply voltage until it
starts to impair the performance of your amplifier.

The 60 Ohms resistor provides 1 nV / rt Hz. The VCVS amplifies
it to the required level and adds it to clean Vcc.
The 100 nV dc source is only there to avoid a simulator crash.

regards,
Gerhard


That works in frequency domain analysis, but I don't think that
Johnson and other noise sources can appear in a transient analysis.

I actually built some time-domain voltage noise sources using random
functions. I don't remember why I did that, to make jitter maybe.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

Gerhard Hoffmann
Guest

Tue Feb 12, 2019 5:45 pm   



Am 12.02.19 um 16:30 schrieb John Larkin:
Quote:
On Tue, 12 Feb 2019 02:36:03 +0100, Gerhard Hoffmann
ghf_at_hoffmann-hochfrequenz.de> wrote:

Am 11.02.19 um 21:08 schrieb John Larkin:

I have added time-domain noise sources to LT Spice, but that's hack.
Spice is great for large-signal, time-domain stuff.



https://www.flickr.com/photos/137684711_at_N07/47014667932/in/album-72157662535945536/



This is a dirty power supply. With it, you can check in a LTspice noise
simulation how much dirt you can tolerate on a supply voltage until it
starts to impair the performance of your amplifier.

The 60 Ohms resistor provides 1 nV / rt Hz. The VCVS amplifies
it to the required level and adds it to clean Vcc.
The 100 nV dc source is only there to avoid a simulator crash.


That works in frequency domain analysis, but I don't think that
Johnson and other noise sources can appear in a transient analysis.


Yes, I wrote that in my complaints list, what Spice cannot do.

Quote:
I actually built some time-domain voltage noise sources using random
functions. I don't remember why I did that, to make jitter maybe.


regards, Gerhard

Phil Hobbs
Guest

Tue Feb 12, 2019 7:45 pm   



On 2/9/19 1:26 PM, upsidedown_at_downunder.com wrote:
Quote:
On Sat, 09 Feb 2019 09:22:56 -0800, John Larkin
jjlarkin_at_highlandtechnology.com> wrote:

On Sat, 09 Feb 2019 17:52:12 +0200, upsidedown_at_downunder.com wrote:

On Sat, 9 Feb 2019 03:36:06 -0800 (PST), dakupoto_at_gmail.com wrote:

Could some electronics guru here help clarify the following.
Small signal S parameter amalysis is based on small signal
levels and a linearized cirucuit, with a DC operating point(bias) condition.
Large signal S parameter extends this scheme to high power
operating conditions of non-linear devices, where the
assumptions of small signal do not hold. Large signal
S parameter scheme is based on harmonic balance, which
involves analyzing the signals in the frequency domain.
i.e., Forier transforms.
Both schemes use a 2 port network, with the signal entering
at the inpit("from") port and coming out at the output("to")
port.
With these in mind, what about oscillators ? These are
one port networks, with a 2 port component (amplifier)
in it. So are large and small signal S parameters
applicable to oscillators ?

Think about the Barkhausen criterion, the total loop gain must be
larger than 1 and the total phase around the loop must be correct.

At oscillator startup, there is always some amplifier input related
white thermal noise. The amplifier amplifies the noise G times. This
noise is them coupled back to the input via the frequency selective
network with quality Q with correct phase, thus a narrow band noise
with bandwidth f/Q is connected back to amplifier input. The noise is
amplified nearly to G² times and then running again through the filter
and having f/Q² bandwidth at amplifier input. During next iteration
the signal is amplified up to G³ and filtered again to f/Q³ and so on.

This continues, until the signal amplitude is limited by the available
voltage swing.

The small signal s-parameters are initially critical, since the
Barkhausen criterions must be satisfied from thermal noise levels up
to limiting.

If the amp's transfer function has the right (ie, wrong) shape you can
make an oscillator that will run but not start.

Biasing the amplifier into class-C and the oscillator will not
automatically start. Once started the amplification in class C will
kick the resonator once each cycle.

In practice, such oscillators may start by quickly applying the
operating voltage, which allows some collector current to flow
momentarily. You may end up with an oscillator, which starts nicely
when battery powered but not when mains powered through linear power
supply with big electrolytes Smile. With such power supply, the voltage
may start too slowly to initiate the initial cycle.



And if it ever quits (e.g. due to a transient brownout) it won't start
up again.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

Phil Hobbs
Guest

Tue Feb 12, 2019 7:45 pm   



On 2/12/19 11:24 AM, Gerhard Hoffmann wrote:
Quote:
Am 12.02.19 um 16:30 schrieb John Larkin:
On Tue, 12 Feb 2019 02:36:03 +0100, Gerhard Hoffmann
ghf_at_hoffmann-hochfrequenz.de> wrote:

Am 11.02.19 um 21:08 schrieb John Larkin:

I have added time-domain noise sources to LT Spice, but that's hack.
Spice is great for large-signal, time-domain stuff.



https://www.flickr.com/photos/137684711_at_N07/47014667932/in/album-72157662535945536/

  


This is a dirty power supply. With it, you can check in a LTspice noise
simulation how much dirt you can tolerate on a supply voltage until it
starts to impair the performance of your amplifier.

The 60 Ohms resistor provides 1 nV / rt Hz. The VCVS amplifies
it to the required level and adds it to clean Vcc.
The 100 nV dc source is only there to avoid a simulator crash.


That works in frequency domain analysis, but I don't think that
Johnson and other noise sources can appear in a transient analysis.

Yes, I wrote that in my  complaints list, what Spice cannot do.

I actually built some time-domain voltage noise sources using random
functions. I don't remember why I did that, to make jitter maybe.

regards, Gerhard


You can make a .wav file of band-limited white Gaussian noise pretty
easily in Octave--use the Box-Mueller method and the wavwrite()
function. <https://p5r.uk/blog/2009/audio-with-gnu-octave.html>

LTspice reads and writes them pretty well, I believe. (I haven't done
it myself.)

<http://electrostud.wikia.com/wiki/Using_WAVE_files_as_input/output_in_LTSpice>

I expect that's how Robert Macy does his .tranoise simulations that he
posted about in 2014 or thereabouts.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

Clifford Heath
Guest

Tue Feb 12, 2019 10:45 pm   



On 13/2/19 2:17 am, Phil Hobbs wrote:
Quote:
On 2/11/19 8:11 PM, Clifford Heath wrote:
On 12/2/19 7:08 am, John Larkin wrote:
  A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.

LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g. CML,
TinyLogic, that I'm already aware of)

Clifford Heath.

ChesterW and I built a 100-ps-class single-diode TDR with a BOM of about
$2, using a pHEMT driven by a line receiver and a very small Schottky
diode, all done dead-bug style.  'Tweren't as clean as an SD-24, of
course, but it was surprisingly good for what it was.


I've been paying close attention to JL's fast ramp generators, CML
drivers and discussions on LVDS receivers to know where to start
tinkering, but I would be stumbling around, not engineering it. I'm very
envious of you having enough sekrit sauce and the right test gear to do
it, especially so cheaply, because I'd love to put something like that
out into the maker community. But I didn't ask for details because it's
your livelihood. I reckon I could stumble to 500ps without much more
than what I have, and any result beyond that would be randumb luck.

So (beggar holds out his bowl), any further tips are welcome.

Clifford Heath.

John Larkin
Guest

Tue Feb 12, 2019 10:45 pm   



On Wed, 13 Feb 2019 08:09:37 +1100, Clifford Heath
<no.spam_at_please.net> wrote:

Quote:
On 13/2/19 2:17 am, Phil Hobbs wrote:
On 2/11/19 8:11 PM, Clifford Heath wrote:
On 12/2/19 7:08 am, John Larkin wrote:
A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.

LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g. CML,
TinyLogic, that I'm already aware of)

Clifford Heath.

ChesterW and I built a 100-ps-class single-diode TDR with a BOM of about
$2, using a pHEMT driven by a line receiver and a very small Schottky
diode, all done dead-bug style. 'Tweren't as clean as an SD-24, of
course, but it was surprisingly good for what it was.

I've been paying close attention to JL's fast ramp generators, CML
drivers and discussions on LVDS receivers to know where to start
tinkering, but I would be stumbling around, not engineering it. I'm very
envious of you having enough sekrit sauce and the right test gear to do
it, especially so cheaply, because I'd love to put something like that
out into the maker community. But I didn't ask for details because it's
your livelihood. I reckon I could stumble to 500ps without much more
than what I have, and any result beyond that would be randumb luck.

So (beggar holds out his bowl), any further tips are welcome.

Clifford Heath.


I have a circuit, and a built board, for a TDR that might be in the 40
ps range. The step generator is a CML comparator, and the sampler is a
fast ecl D-flop, working in slideback/single-bit mode. I never got
around to making it work.

The parts are a tad expensive, but 100 ps is do-able cheap, as Phil
notes. 100 ps is about as slow as you'd want to go for PCB work.

There was also a TDR student project at SF State, which I sponsored.
It used an SRD for the step and a classic 2-diode sampler. One of my
guys was on the team, as a student, and he may have the paper still.
I'll see. After he did that, I hired him.

I also have a PowerBasic program that does targeted deconvolution,
namely designs a software FIR filter that makes an ugly TDR step into
a pretty one.

https://www.dropbox.com/s/iqpldbkq2awdeml/TDR_Decon_demo.jpg?dl=0


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Phil Hobbs
Guest

Wed Feb 13, 2019 12:45 am   



On 2/12/19 4:09 PM, Clifford Heath wrote:
Quote:
On 13/2/19 2:17 am, Phil Hobbs wrote:
On 2/11/19 8:11 PM, Clifford Heath wrote:
On 12/2/19 7:08 am, John Larkin wrote:
  A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.

LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g.
CML, TinyLogic, that I'm already aware of)

Clifford Heath.

ChesterW and I built a 100-ps-class single-diode TDR with a BOM of
about $2, using a pHEMT driven by a line receiver and a very small
Schottky diode, all done dead-bug style.  'Tweren't as clean as an
SD-24, of course, but it was surprisingly good for what it was.

I've been paying close attention to JL's fast ramp generators, CML
drivers and discussions on LVDS receivers to know where to start
tinkering, but I would be stumbling around, not engineering it. I'm very
envious of you having enough sekrit sauce and the right test gear to do
it, especially so cheaply, because I'd love to put something like that
out into the maker community. But I didn't ask for details because it's
your livelihood. I reckon I could stumble to 500ps without much more
than what I have, and any result beyond that would be randumb luck.

So (beggar holds out his bowl), any further tips are welcome.

Clifford Heath.


I can't post the full schematic because it belongs to the customer, and
because Chester designed the delay generator part, but the speedy bits
of a slightly earlier version are at

<https://electrooptical.net/www/sed/DiodeSamplerSchematic.png>

It was the first TDR I ever built, so it's not like there's that much
at stake. ;)

Here's a mildly redacted version of the simulation, without the
customer's device attached to the sampling line at top right.

<https://electrooptical.net/www/sed/DiodeSampler.png>

and the measured TDR response
<https://electrooptical.net/www/sed/PulseResponseOfSamplerProto.pdf>

It works a lot better with a pHEMT like an ATF55143 at Q4. Probably one
of the Mini-Circuits SAV series would be a drop-in substitute, but I
haven't had the opportunity to check.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

John Larkin
Guest

Wed Feb 13, 2019 1:45 am   



On Tue, 12 Feb 2019 13:08:10 -0500, Phil Hobbs
<pcdhSpamMeSenseless_at_electrooptical.net> wrote:

Quote:
On 2/12/19 11:24 AM, Gerhard Hoffmann wrote:
Am 12.02.19 um 16:30 schrieb John Larkin:
On Tue, 12 Feb 2019 02:36:03 +0100, Gerhard Hoffmann
ghf_at_hoffmann-hochfrequenz.de> wrote:

Am 11.02.19 um 21:08 schrieb John Larkin:

I have added time-domain noise sources to LT Spice, but that's hack.
Spice is great for large-signal, time-domain stuff.



https://www.flickr.com/photos/137684711_at_N07/47014667932/in/album-72157662535945536/




This is a dirty power supply. With it, you can check in a LTspice noise
simulation how much dirt you can tolerate on a supply voltage until it
starts to impair the performance of your amplifier.

The 60 Ohms resistor provides 1 nV / rt Hz. The VCVS amplifies
it to the required level and adds it to clean Vcc.
The 100 nV dc source is only there to avoid a simulator crash.


That works in frequency domain analysis, but I don't think that
Johnson and other noise sources can appear in a transient analysis.

Yes, I wrote that in my complaints list, what Spice cannot do.

I actually built some time-domain voltage noise sources using random
functions. I don't remember why I did that, to make jitter maybe.

regards, Gerhard


You can make a .wav file of band-limited white Gaussian noise pretty
easily in Octave--use the Box-Mueller method and the wavwrite()
function. <https://p5r.uk/blog/2009/audio-with-gnu-octave.html

LTspice reads and writes them pretty well, I believe. (I haven't done
it myself.)

http://electrostud.wikia.com/wiki/Using_WAVE_files_as_input/output_in_LTSpice

I expect that's how Robert Macy does his .tranoise simulations that he
posted about in 2014 or thereabouts.

Cheers

Phil Hobbs


This is a basic noise gen

Version 4
SHEET 1 880 680
WIRE 320 64 128 64
WIRE 368 64 320 64
WIRE 400 64 368 64
WIRE 128 96 128 64
WIRE 320 112 320 64
WIRE 128 208 128 176
WIRE 320 208 320 192
FLAG 128 208 0
FLAG 320 208 0
FLAG 368 64 NOISE
SYMBOL bv 128 80 R0
WINDOW 0 -198 53 Left 2
WINDOW 3 -336 104 Left 2
SYMATTR InstName B1
SYMATTR Value V=random(100*time) - 0.5
SYMBOL res 304 96 R0
WINDOW 0 -59 37 Left 2
WINDOW 3 -56 73 Left 2
SYMATTR InstName R1
SYMATTR Value 1
TEXT -96 64 Left 2 !.tran 5



and this one is more gaussian, fun but kinda overkill.


Version 4
SHEET 1 1484 680
WIRE 208 64 128 64
WIRE 256 64 208 64
WIRE 416 64 336 64
WIRE 480 64 416 64
WIRE 528 64 480 64
WIRE 128 96 128 64
WIRE 416 112 416 64
WIRE 128 208 128 176
WIRE 416 208 416 176
FLAG 128 208 0
FLAG 208 64 RAW
FLAG 416 208 0
FLAG 480 64 OUT
SYMBOL bv 128 80 R0
WINDOW 0 34 107 Left 2
WINDOW 3 -79 203 Left 2
SYMATTR InstName B1
SYMATTR Value V= VS * ( rand(K1*time) + rand(K2*time) + rand(K3*time)
+ rand(K4*time) + rand(K5*time) + rand(K6*time) - 3 )
SYMBOL res 352 48 R90
WINDOW 0 63 52 VBottom 2
WINDOW 3 68 54 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 400 112 R0
WINDOW 0 85 22 Left 2
WINDOW 3 63 55 Left 2
SYMATTR InstName C1
SYMATTR Value 1.6e-4
TEXT 736 216 Left 2 !.tran 0 50 0 5u
TEXT 88 -64 Left 2 ;1 volt RMS 1 KHz Time-domain Noise Generator
TEXT 240 -16 Left 2 ;J Larkin August 1, 2014
TEXT 704 -64 Left 2 !.PARAM K2 = {21599}
TEXT 704 -104 Left 2 !.PARAM K1 = {13001}
TEXT 704 -24 Left 2 !.PARAM K3 = {17377}
TEXT 704 16 Left 2 !.PARAM K4 = {7001}
TEXT 704 152 Left 2 !.PARAM VS = {3}
TEXT 704 56 Left 2 !.PARAM K5 = {15803}
TEXT 704 96 Left 2 !.PARAM K6 = {8011}


(fix the usenet line wraps)








--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Gerhard Hoffmann
Guest

Wed Feb 13, 2019 3:45 am   



Am 12.02.19 um 02:11 schrieb Clifford Heath:
Quote:
On 12/2/19 7:08 am, John Larkin wrote:
  A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.

LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?


Maybe it ceases conducting ofter 0.6 ns, but the
transition is not, eh, snappy.

Quote:

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g. CML,
TinyLogic, that I'm already aware of)

Clifford Heath.


Tunnel diodes, SRDs and the like are pretty much extinct.
You can play with nonlinear transmission lines / small varicaps,
I once have made some half-hearted simulations in Spice,
but that resulted in nothing really usable.

You can get that

<
https://www.flickr.com/photos/137684711_at_N07/33305853110/in/album-72157662535945536/
>

from an Analog Devices ADCMP580, with maybe just a NE555
in front of it.

The hardware that generated this is not very noble, just resurrected
it from the junk bin:

<
https://www.flickr.com/photos/137684711_at_N07/46353954234/in/album-72157662535945536/
>

A home-etched tiny board that has ground plane, decoupling and
input terminations. For the signals that count: run them into semi rigid
coax just at the device pin. The board is 0.5mm Bungard pre-sensitized
FR4. If your laser printer can print it on foil, you can etch it.

And no, the Chinese boards are too thick @ 1.6mm and neither cheap nor
fast if there is anything non-standard. I need just a good hour from
layout in the computer to start soldering.

The pinout of ECL/CML chips or op amps is always the same; a few
stamp types let you hack a pulse generator in no time:

<
https://www.flickr.com/photos/137684711_at_N07/32981062014/in/album-72157662535945536/
>

For TDR, get Picosecod Pulse Labs app note an3045C. Now that PSPL
has been bought by TEk, the app notes are no longer on their web site,
but they are still on the site of PSPL's founder. Maybe they mentioned
HP all too often. Grab all of the app notes, they are worth it.

Cheers, Gerhard

Clifford Heath
Guest

Wed Feb 13, 2019 5:45 am   



On 13/2/19 10:32 am, Phil Hobbs wrote:
Quote:
On 2/12/19 4:09 PM, Clifford Heath wrote:
On 13/2/19 2:17 am, Phil Hobbs wrote:
On 2/11/19 8:11 PM, Clifford Heath wrote:
On 12/2/19 7:08 am, John Larkin wrote:
  A stock 1N914 sure behaves like
an SRD. Probably unrealistically so.

LTSpice says the snap-off time is circa 0.6ns.
What have you measured in real devices?

What other non-SRD device would you choose for a fast step-recovery
pulse generator, e.g. in a hobby TDR? (aside from fast logic e.g.
CML, TinyLogic, that I'm already aware of)

Clifford Heath.

ChesterW and I built a 100-ps-class single-diode TDR with a BOM of
about $2, using a pHEMT driven by a line receiver and a very small
Schottky diode, all done dead-bug style.  'Tweren't as clean as an
SD-24, of course, but it was surprisingly good for what it was.

I've been paying close attention to JL's fast ramp generators, CML
drivers and discussions on LVDS receivers to know where to start
tinkering, but I would be stumbling around, not engineering it. I'm
very envious of you having enough sekrit sauce and the right test gear
to do it, especially so cheaply, because I'd love to put something
like that out into the maker community. But I didn't ask for details
because it's your livelihood. I reckon I could stumble to 500ps
without much more than what I have, and any result beyond that would
be randumb luck.

So (beggar holds out his bowl), any further tips are welcome.

Clifford Heath.

I can't post the full schematic because it belongs to the customer, and
because Chester designed the delay generator part, but the speedy bits
of a slightly earlier version are at

https://electrooptical.net/www/sed/DiodeSamplerSchematic.png

  It was the first TDR I ever built, so it's not like there's that much
at stake. ;)

Here's a mildly redacted version of the simulation, without the
customer's device attached to the sampling line at top right.

https://electrooptical.net/www/sed/DiodeSampler.png

and the measured TDR response
https://electrooptical.net/www/sed/PulseResponseOfSamplerProto.pdf

It works a lot better with a pHEMT like an ATF55143 at Q4.  Probably one
of the Mini-Circuits SAV series would be a drop-in substitute, but I
haven't had the opportunity to check.

Cheers

Phil Hobbs


Many thanks, Phil. Quite a bit more complexity in the receive amp than
I'd expected. Looks like the voltages written at Q4 might be wrong -
1.66 right but 1.9V should be 1.66-Vbe or about 1V? I see why you were
complaining about fast PNPs becoming EOL! You have a lot of fast stages
before the T&H - not easily reducible?

Clifford Heath.

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