Rugged USB card?

On 2/2/2012 8:12 AM, Joerg wrote:
miso wrote:
On 2/1/2012 1:25 PM, Joerg wrote:
Nico Coesel wrote:
Joerg<invalid_at_invalid.invalid> wrote:

Hi Guys,

Does anyone know of a super-rugged USB card with four or more USB
downstream slots? PCI-e or PCI would be nice. External hub not so
much,
but would be ok if nothing else is available.

Main drawbacks of literally every card I've seen: USB tied into board
but not into the PC chassis. No common mode chokes. Both of this is
causing ESD failures galore.

Price is not too important as long as it's under $200 or so. I know
there are mil-spec hubs north of $500 but that's too steep.

How many do you need? It shouldn't be very hard to design a board.


Sure, but that's what we wanted to avoid :-)

We cannot possibly be the only ones who need level 4 ESD performance
without resorting to external boxes.


Perhaps you can find a USB PCB socket with ESD protection built in, and
then replace the sockets on the COTS device.


That is something I had looked at but found none that contain a CM
choke. Strange, for RJ45 you can find them all over the place but not
for USB. Without CM chokes this isn't going to work because you can't
have super-fat TVS'es on D+ and D- due to their capacitance.


Or you build a cable that is a USB extender with some additional ESD
protection.


Then we might as well build our own PCI card :-)


A little capacitance goes a long way in improving ESD. If you don't need
a full length USB cable, you could load the pins on the COTS card with
additional capacitance.


You can. But even 100pF is small consolation with level 4 jolts.


Lastly, call a reputable chip maker like NEC and get their data on ESD.
It may be a card with the NEC chip is all you need.


Good idea. Although I have seen USB with NEC chips hiccup on ESD. And I
fixed that with CM chokes. Those chokes are missing on nearly all USB
gear. I guess that 10 cents per port is asking too much.

It isn't clear to me where you are putting the common mode chokes. Data
lines? Power? If in the power, this could lead to latchup.

Lastly, if you have a product this touchy, I hope you have a redesign
coming. If something doesn't work with bog standard USB, it seems to me
like a problem.

They are only on the data lines.


Lastly, if you have a product this touchy, I hope you have a redesign
coming. If something doesn't work with bog standard USB, it seems to me
like a problem.


We are almost there. Our hardware is done, it's the PC that hicks up and
that isn't under our design control.

Try zapping USB cable into a PC with level 4 ESD at machine gun
repetition rates during data transmissions and watch. You may be very
surprised :-)

Hint: The EOP message is transmitted by pulling both data lines low, a
violation of the otherwise clever differential transmission scheme. So
when the ESD pulse goes negative ...

They are only on the data lines.


Lastly, if you have a product this touchy, I hope you have a redesign
coming. If something doesn't work with bog standard USB, it seems to me
like a problem.


We are almost there. Our hardware is done, it's the PC that hicks up and
that isn't under our design control.

Try zapping USB cable into a PC with level 4 ESD at machine gun
repetition rates during data transmissions and watch. You may be very
surprised :-)

Hint: The EOP message is transmitted by pulling both data lines low, a
violation of the otherwise clever differential transmission scheme. So
when the ESD pulse goes negative ...


OK, inductance on the data lines isn't a latch up issue. Still if I had
my druthers designing the usb line driver, I'd rather deal with a large
amount of capacitance than see inductance.

Have you ever considered calling one of these usb chip companies and
explaining your issues. They would probably rather design a beefy driver
chip than see customers add inductors. You are probably not large enough
to get PME visits, plus your locations isn't exactly "industrial", but
calling apps with suggestions won't go into the infinite bit bucket at
most companies. If they can design a beefier part with the same pinout
as the schlock part, then the Chinese board stuffers can make your
rugged box.

Most app engineers rather go into product marketing, so they are likely
to try to peddle your suggestions.

How does something get zapped with ESD when it is already plugged in. Or
is this the scenario:

Your box is sitting there doing whatever. I have to assume it has it's
own power supply versus using the usb power. Then you zap the box at the
usb port with no cable attached.

I know know to design chips for ESD, but not systems, so I don't have
the test setup visualized.

If I had my druthers I'd design a whole new PCI card for USB and be done
with the problem. But we ain't got the time to do that.

There are USB 3.0 PCIe cards in the channel. They are 100% backward

The rule is this: Everything that is or can be connected during normal
use must be connected. Then the test lab zaps it almost everywhere a
user can potentially get a hand onto. For example into a USB cable
shield. A seasoned tech there knows the typical hot spots and goes for
those.

I do not know much about ESD on a chip but I do know board level stuff.

Have designed some things where a major bolt of lightning can pulverize
the fence post 100ft down the road and the unit keeps on humming.

On Sat, 04 Feb 2012 08:01:32 -0800, Joerg<invalid_at_invalid.invalid
wrote:


I do not know much about ESD on a chip but I do know board level stuff.

I have serious doubts.

On 2/4/2012 10:52 AM, FatBytestard wrote:
On Sat, 04 Feb 2012 08:01:32 -0800, Joerg<invalid_at_invalid.invalid
wrote:


I do not know much about ESD on a chip but I do know board level stuff.

I have serious doubts.

Here is a surprise. Nobody cares what you think.

On 2/4/2012 10:52 AM, FatBytestard wrote:

On Sat, 04 Feb 2012 08:01:32 -0800, Joerg<invalid_at_invalid.invalid
wrote:


I do not know much about ESD on a chip but I do know board level stuff.


I have serious doubts.


Here is a surprise. Nobody cares what you think.

But that isn't a surprise.

Now I get it. You are zapping the ground. Doh! I've only heard of this
testing, never saw it in the flesh.

When HP was HP (as in everything had to be top notch because people
judge you on the crappiest thing that you put your name on), I was in a
meeting with them and they wanted 25KV ESD. I think I quoted 5kV. They
didn't blink and just said everything leaving the factory will do 25KV
even if we have to make it do that ourselves.

if you come in where it's too late for
layout changes or when dealing with OEM boards.

On 2/4/2012 10:52 AM, FatBytestard wrote:
On Sat, 04 Feb 2012 08:01:32 -0800, Joerg<invalid_at_invalid.invalid
wrote:


I do not know much about ESD on a chip but I do know board level stuff.

I have serious doubts.

Here is a surprise. Nobody cares what you think.

Regards, Joerg

http://www.analogconsultants.com/

An alternate approach for protecting an USB port is to use an USB
isolator. See:
http://www.keterex.com/kxusb150.php?gclid=CPbn-vHYgK4CFQXCKgodMAmZ3Q

An isolator costs a lot less than a MIL Spec USB Hub. A Google search
on "USB Isolator" will turn up additional hits.