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reduce EDK synthesis time

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catto
Guest

Thu Sep 08, 2011 11:39 am   



Hello,
i'm working on microblaze project (using ISE 10.1) and obviously addin
peripheral the EDK synthesis takes a long time.
There's a method or tool to improve this time??
I've tried the -smartguide switch but it doesn't work, i'm trying usin
partition. Have you any regard?
Sorry for my english i'm foreign.



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Posted through http://www.FPGARelated.com

Benjamin Couillard
Guest

Thu Sep 08, 2011 10:37 pm   



On 8 sep, 07:39, "catto" <catto.15_at_n_o_s_p_a_m.hotmail.it> wrote:
Quote:
Hello,
i'm working on microblaze project (using ISE 10.1) and obviously adding
peripheral the EDK synthesis takes a long time.
There's a method or  tool to improve this time??
I've tried the -smartguide switch but it doesn't work, i'm trying using
partition. Have you any regard?
Sorry for my english i'm foreign.

---------------------------------------        
Posted throughhttp://www.FPGARelated.com

ISE 13.1 is much faster than ISE 10.1 so if you're starting a new
design you might consider using ISE 13.1 Furthermore, Xilinx has
improved EDK a lot.

Benjamin Couillard
Guest

Thu Sep 08, 2011 10:43 pm   



I would say that for synthesis in general, the speedup is about 2x
between version 10.1 and 13.1

Steve
Guest

Fri Sep 09, 2011 3:09 am   



On 09/09/2011 06:43 AM, Benjamin Couillard wrote:
Quote:
I would say that for synthesis in general, the speedup is about 2x
between version 10.1 and 13.1

EDK 13.2 now also adds support for parallel synthesis, which can give a
big speed up if your computer has more than one CPU.
You can enable it from:

XPS->Preferences->Synthesis->[x]Parallel Synthesis

Nice feature :)

Stephen Ecob
Silicon On Inspiration
Sydney Australia
www.sioi.com.au
$39 Spartan 6 board with 32MB DDR DRAM ?
http://www.sioi.com.au/shop/product_info.php/products_id/47

fpga_me
Guest

Thu Sep 15, 2011 3:26 pm   



Echoing what others have said. You should really use versions greater tha
11.4. This is because Xilinx changed a lot of the backend algorithms. IS
is now noticeably faster than <11.4.

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Posted through http://www.FPGARelated.com

elektroda.net NewsGroups Forum Index - FPGA - reduce EDK synthesis time

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