# Purpose of a | (a ^ a)

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Guest

Fri Nov 10, 2017 12:19 pm

I am reading some 3rd party verilog code for synchronizer circuits (clock domain crossing). I see a many statements that look like this: assign out = a | (a ^ a). This code is used in simulation mode. I don't see the point of adding a^a since that equals 0. Can anyone think of a reason why this would be useful/needed? Thanks.

Allan Herriman
Guest

Sat Nov 11, 2017 8:00 am

On Fri, 10 Nov 2017 02:19:12 -0800, pallavgupta wrote:

Quote:
I am reading some 3rd party verilog code for synchronizer circuits
(clock domain crossing). I see a many statements that look like this:
assign out = a | (a ^ a). This code is used in simulation mode. I don't
see the point of adding a^a since that equals 0. Can anyone think of a
reason why this would be useful/needed? Thanks.

In some ideal mathematical world, a^a is identically zero. But in the
world of HDL simulation, bits have metavalues that aren't 0 or 1.

a^a is 0 as long as a is 0 or 1. But if a is X, a^a is also X.

So a|(a^a) is the same as a, as long as a is only ever 0 or 1. If a is
ever X, the result will become X and hold that value forever (or until a
is set to 0 or 1 again by some other logic).

I guess this "X-catcher" was used in modelling of the misbehaviour of
your synchroniser circuit. If it doesn't have an X at the end of
simulation, you know that it never had an X at any time during the
simulation.

Regards,
Allan

Allan Herriman
Guest

Sat Nov 11, 2017 8:39 am

On Sat, 11 Nov 2017 06:00:40 +0000, Allan Herriman wrote:

Quote:
On Fri, 10 Nov 2017 02:19:12 -0800, pallavgupta wrote:

I am reading some 3rd party verilog code for synchronizer circuits
(clock domain crossing). I see a many statements that look like this:
assign out = a | (a ^ a). This code is used in simulation mode. I don't
see the point of adding a^a since that equals 0. Can anyone think of a
reason why this would be useful/needed? Thanks.

In some ideal mathematical world, a^a is identically zero. But in the
world of HDL simulation, bits have metavalues that aren't 0 or 1.

a^a is 0 as long as a is 0 or 1. But if a is X, a^a is also X.

So a|(a^a) is the same as a, as long as a is only ever 0 or 1. If a is
ever X, the result will become X and hold that value forever (or until a
is set to 0 or 1 again by some other logic).

I guess this "X-catcher" was used in modelling of the misbehaviour of
your synchroniser circuit. If it doesn't have an X at the end of
simulation, you know that it never had an X at any time during the
simulation.

BTW, I'm assuming that the expression is used with some sort of feedback.

OTOH, it could also be used for another purpose: to convert any possible
(meta)value to one of 0, 1 or X, in a similar fashion to the VHDL
to_X01() function.

Allan

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