parvez ahmad
Guest
Fri Feb 11, 2011 7:15 pm
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded from
https://sourceforge.net/projects/sim-sim/files/releases/
rickman
Guest
Sat Feb 12, 2011 3:30 am
On Feb 11, 12:15 pm, parvez ahmad <parv.ah...@gmail.com> wrote:
Quote:
I take it this is a Linux only program?
Rick
parvez ahmad
Guest
Sat Feb 12, 2011 7:57 am
On Feb 12, 6:33 am, rickman <gnu...@gmail.com> wrote:
Quote:
For now the release is Linux only, you can try building on other
platforms.
Uwe Bonnes
Guest
Sat Feb 12, 2011 2:56 pm
parvez ahmad <parv.ahmad_at_gmail.com> wrote:
Quote:
Could you please be a little more verbose? Why and where to use HANA? What
can be done, and what not?
--
Uwe Bonnes bon_at_elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
nazia khan
Guest
Sun Feb 20, 2011 9:44 am
On Feb 12, 6:33 am, rickman <gnu...@gmail.com> wrote:
Quote:
Rick,
A windows release is uploaded at the same place. There is no GUI yet,
you need to run it in batch mode.
nazia khan
Guest
Sun Feb 20, 2011 9:46 am
On Feb 12, 5:56 pm, Uwe Bonnes <b...@elektron.ikp.physik.tu-
darmstadt.de> wrote:
Quote:
parvez ahmad <parv.ah...@gmail.com> wrote:
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded from
https://sourceforge.net/projects/sim-sim/files/releases/
Could you please be a little more verbose? Why and where to use HANA? What
can be done, and what not?
--
Uwe Bonnes b...@elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Uwe,
This is a synthesis tool which converts behavioural verilog code into
gate level netlist.
