Need a bit of design work done

that is very easy one.
Use a multiswitch with a lot of contacts that is the trick. You
will not have to use any electronics only some 1 % resistors.
You also can use a coarse and fine switch as 48 pos switches are
rare.

"Mike Rocket J. Squirrel Elliott"
j.michael.elliottAT_at_REMOVETHEOBVIOUSgmailDOT.com> wrote:


Oops -- Thanks! (Wrong chip, right family. The LM3914 is the linear one.)


The LM3914 has overlapping comparators and no hysteresis so for some of the
pot you will have one relay on, some of the pot you will have two relays
on, and the rest of the pot you will have one on and one buzzing with the
slightest noise in the system.

Clocks and potential interference. The product will be a vacuum-tube
high end audio phono preamplifier.

And I thought is was going to be something sensible like a tapped inductor
for an antenna tuner ;|

Clocks and potential interference. The product will be a vacuum-tube
high end audio phono preamplifier.

And I thought is was going to be something sensible like a tapped inductor
for an antenna tuner ;|

Hah. As if. Sensible -- if I wanted to do something sensible I'd have
found another line of work. Or maybe not: I'm going back to college to
get my Master's degree in social work. How sensible is that?

"Mike Rocket J. Squirrel Elliott"
j.michael.elliottAT_at_REMOVETHEOBVIOUSgmailDOT.com> wrote:


Clocks and potential interference. The product will be a vacuum-tube
high end audio phono preamplifier.



And I thought is was going to be something sensible like a tapped inductor
for an antenna tuner ;|


Hah. As if. Sensible -- if I wanted to do something sensible I'd have
found another line of work. Or maybe not: I'm going back to college to
get my Master's degree in social work. How sensible is that?


Well high end audio is more of a social than electronic phenomena.

If you insist on a non-processor solution I think I would use a 6 bit
up/down counter clocked at a few Hz. Drive a DAC from the counter and
slightly tricky dual comparators compare its output with a voltage from the
pot. The comparators will produce up/down enables for the counter.

That would take about 5 chips and give you a 6 bit binary code which tracks
the pot with no missing counts and a defined maximum slew rate.

The make before break is tricky and perhaps depends on how you can drive
the relays.

7 off 3 to 8 line decoders like the 4051 will give you one of 48 outputs
from a 6 bit code.

If the relays need drivers then integrating an R/C turn off delay on each
driver might be the simplest. If the relays can be driven by 'logic' then
it may be simpler to have two 6 to 48 line decoders driving the relays, one
from the up/down counter and another from a latched copy of the counter
delayed by one clock.

Hmmm. I like the way you think! Does anyone make IC's with
multiple window comparators with something like one-pin control
of hysteresis . . . ?

On 3/29/2005 2:50 PM Helmut Sennewald wrote:

"Mike Rocket J. Squirrel Elliott"
j.michael.elliottAT_at_REMOVETHEOBVIOUSgmailDOT.com> schrieb im
Newsbeitrag
news:oPmdnd2iT_QmKdTfRVn-pw_at_adelphia.com...

On 3/29/2005 10:43 AM Mike Rocket J. Squirrel Elliott wrote:


On 3/29/2005 3:08 AM Robert Baer wrote:


Mike Rocket J. Squirrel Elliott wrote:


I'm an analog guy and I need for a bit of logic/adc design work
done,
will pay. The design is essentially to sample the voltage on the
wiper
of a potentiometer, and use it to drive one of 48 relays,
depending on
the wiper voltage. The relays need to be driven in a
make-before-break
style. I don't want to run any clocks in the product if at all
possible. Low-speed stuff. I reckon this is digital design 101
as
taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are
interested.

I'm located in Carlsbad, CA.

Oops -- Thanks! (Wrong chip, right family. The LM3914 is the linear
one.)

I don't know how to write code, so programming a uC would require
paying
someone for that. And buying hardware to program the uC. I can't
debug
code, either, so I would need to keep bothering the programmer. I've
had
difficulty in the past with code that needed debugging a couple years

later, only to find that the programmer guy was no longer available.
A
hardware implementation, like this simple IC approach, is something I

can understand and debug myself. I guess I prefer to do things myself
if
possible using technology even I can understand.

Clocks and potential interference. The product will be a vacuum-tube
high end audio phono preamplifier. I personally don't think that
having
an oscillator in this product will be a problem with halfway decent
shielding. But the marketplace will have more trust in the product if
it
is dead quiet (EMI-wise) inside. High-end audio is odd that way. Far
easier to not build in a perceived problem then try to defend
challenges
later.

Mike Rocket J. Squirrel Elliott wrote:

On 3/29/2005 2:50 PM Helmut Sennewald wrote:


"Mike Rocket J. Squirrel Elliott"
j.michael.elliottAT_at_REMOVETHEOBVIOUSgmailDOT.com> schrieb im

Newsbeitrag

news:oPmdnd2iT_QmKdTfRVn-pw_at_adelphia.com...


On 3/29/2005 10:43 AM Mike Rocket J. Squirrel Elliott wrote:



On 3/29/2005 3:08 AM Robert Baer wrote:



Mike Rocket J. Squirrel Elliott wrote:



I'm an analog guy and I need for a bit of logic/adc design work

done,

will pay. The design is essentially to sample the voltage on the

wiper

of a potentiometer, and use it to drive one of 48 relays,

depending on

the wiper voltage. The relays need to be driven in a

make-before-break

style. I don't want to run any clocks in the product if at all
possible. Low-speed stuff. I reckon this is digital design 101

as

taught in 1980.

Please private mail me for more information if this sounds like
no-brainer stuff to you and you have the time and are

interested.

I'm located in Carlsbad, CA.

Oops -- Thanks! (Wrong chip, right family. The LM3914 is the linear

one.)

I don't know how to write code, so programming a uC would require

paying

someone for that. And buying hardware to program the uC. I can't

debug

code, either, so I would need to keep bothering the programmer. I've

had

difficulty in the past with code that needed debugging a couple years


later, only to find that the programmer guy was no longer available.

A

hardware implementation, like this simple IC approach, is something I


can understand and debug myself. I guess I prefer to do things myself

if

possible using technology even I can understand.

Clocks and potential interference. The product will be a vacuum-tube
high end audio phono preamplifier. I personally don't think that

having

an oscillator in this product will be a problem with halfway decent
shielding. But the marketplace will have more trust in the product if

it

is dead quiet (EMI-wise) inside. High-end audio is odd that way. Far
easier to not build in a perceived problem then try to defend

challenges

later.


Have you thought about using a rotary encoder?

Send the 6-bit output (1 of 64) into 2x 3-8 line
decoders. Arrange the 48 relays into a 6x8 matrix,
with 6x high-side relay drivers and 8x low-side.

Get the make-before-break by slugging the OFF of
each relay...... perhaps with 14x R+C gated gates
before the row and column relay drivers.

In article <4d5430173dtonyw_at_ledelec.demon.co.uk>,
Tony Williams <tonyw_at_ledelec.demon.co.uk> wrote:

Send the 6-bit output (1 of 64) into 2x 3-8 line
decoders. Arrange the 48 relays into a 6x8 matrix,
with 6x high-side relay drivers and 8x low-side.

Get the make-before-break by slugging the OFF of
each relay...... perhaps with 14x R+C gated gates
before the row and column relay drivers.

Followup.....

There's a problem when trying to do make-before-break
with a matrix. Overlap of two relays is ok until the
selection of the next relay requires a change to both
a new row and column. Two rows and two columns being
active will result in 4 relays being energised.

The only solution I can see is to have an R+C across
each relay. Around about 100 ohms and 47uF will do a
5-10mS holdup.

In article <4d5430173dtonyw_at_ledelec.demon.co.uk>,
Tony Williams <tonyw_at_ledelec.demon.co.uk> wrote:


Send the 6-bit output (1 of 64) into 2x 3-8 line
decoders. Arrange the 48 relays into a 6x8 matrix,
with 6x high-side relay drivers and 8x low-side.


Get the make-before-break by slugging the OFF of
each relay...... perhaps with 14x R+C gated gates
before the row and column relay drivers.


Followup.....

There's a problem when trying to do make-before-break
with a matrix. Overlap of two relays is ok until the
selection of the next relay requires a change to both
a new row and column. Two rows and two columns being
active will result in 4 relays being energised.

The only solution I can see is to have an R+C across
each relay. Around about 100 ohms and 47uF will do a
5-10mS holdup.

In article <4d5430173dtonyw_at_ledelec.demon.co.uk>,
Tony Williams <tonyw_at_ledelec.demon.co.uk> wrote:

Send the 6-bit output (1 of 64) into 2x 3-8 line
decoders. Arrange the 48 relays into a 6x8 matrix,
with 6x high-side relay drivers and 8x low-side.

Get the make-before-break by slugging the OFF of
each relay...... perhaps with 14x R+C gated gates
before the row and column relay drivers.

Followup.....

There's a problem when trying to do make-before-break
with a matrix. Overlap of two relays is ok until the
selection of the next relay requires a change to both
a new row and column. Two rows and two columns being
active will result in 4 relays being energised.

The only solution I can see is to have an R+C across
each relay. Around about 100 ohms and 47uF will do a
5-10mS holdup.


I presume that you mean to place the R+C across the input

In article <4d55b0d8fetonyw_at_ledelec.demon.co.uk>,
tonyw_at_ledelec.demon.co.uk says...

In article <4d5430173dtonyw_at_ledelec.demon.co.uk>,
Tony Williams <tonyw_at_ledelec.demon.co.uk> wrote:


Send the 6-bit output (1 of 64) into 2x 3-8 line
decoders. Arrange the 48 relays into a 6x8 matrix,
with 6x high-side relay drivers and 8x low-side.

Get the make-before-break by slugging the OFF of
each relay...... perhaps with 14x R+C gated gates
before the row and column relay drivers.

Followup.....

There's a problem when trying to do make-before-break
with a matrix. Overlap of two relays is ok until the
selection of the next relay requires a change to both
a new row and column. Two rows and two columns being
active will result in 4 relays being energised.

The only solution I can see is to have an R+C across
each relay. Around about 100 ohms and 47uF will do a
5-10mS holdup.



I presume that you mean to place the R+C across the input
to the relay driver. Placing substantial resistance
and capacitance near the actual relay coils, with their
low resistance and high inductance, sounds like a problem
looking for a place to happen.


It all seems a bit of overkill when you could simply buy
a 46-position stepped attenuator from Marchand Electronics

http://www.marchandelec.com/att.html

Or are you trying to compete with them by offering an
extra two steps?

Tony Williams wrote:

In article <4d5430173dtonyw_at_ledelec.demon.co.uk>,
Tony Williams <tonyw_at_ledelec.demon.co.uk> wrote:

Send the 6-bit output (1 of 64) into 2x 3-8 line
decoders. Arrange the 48 relays into a 6x8 matrix,
with 6x high-side relay drivers and 8x low-side.



Get the make-before-break by slugging the OFF of
each relay...... perhaps with 14x R+C gated gates
before the row and column relay drivers.



Followup.....

There's a problem when trying to do make-before-break
with a matrix. Overlap of two relays is ok until the
selection of the next relay requires a change to both
a new row and column. Two rows and two columns being
active will result in 4 relays being energised.

The only solution I can see is to have an R+C across
each relay. Around about 100 ohms and 47uF will do a
5-10mS holdup.


Only works if you can predefine the rate the pot is turned.

The better solution is to use some logic, perhaps a small
microprocessor that has an A-to-D converter built in, and
has a clock that is entirely contained within the wafer of
the chip.