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My invention: Coding wave-pipelined circuits with buffering

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elektroda.net NewsGroups Forum Index - Verilog Language - My invention: Coding wave-pipelined circuits with buffering


Guest

Sun Jan 14, 2018 8:28 pm   



Hi,

Please to transfer to following address to concentrate all discussions in one website:

https://groups.google.com/forum/#!topic/comp.arch.fpga/Mg-DRvkIxvY

Thank you.

Weng

rickman
Guest

Tue Jan 16, 2018 6:33 pm   



wtxwtx_at_gmail.com wrote on 1/14/2018 1:28 PM:
Quote:
Hi,

Please to transfer to following address to concentrate all discussions in one website:

https://groups.google.com/forum/#!topic/comp.arch.fpga/Mg-DRvkIxvY

Thank you.

Weng


What discussions?

--

Rick C

Viewed the eclipse at Wintercrest Farms,
on the centerline of totality since 1998


Guest

Sat Jul 14, 2018 11:45 pm   



On Sunday, 14 January 2018 18:28:14 UTC, Weng Tianxiang wrote:
Quote:
Hi,

Please to transfer to following address to concentrate all discussions in one website:

https://groups.google.com/forum/#!topic/comp.arch.fpga/Mg-DRvkIxvY

Thank you.

Weng


Reading through that thread was an exercise in frustration. You aren't listening to anything people tell you.

elektroda.net NewsGroups Forum Index - Verilog Language - My invention: Coding wave-pipelined circuits with buffering

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