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Modelsim PE vs. Aldec Active-HDL (PE)

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Pete Fraser
Guest

Wed Mar 03, 2010 2:02 pm   



I've finally decided to buy a better simulator
(I've been making do with Modelsim XE so far).

Any thoughts as to the relative merits of Modelsim PE and
Active-HDL (PE) for FPGA simulation?

Thanks

Pete

rickman
Guest

Wed Mar 03, 2010 4:13 pm   



On Mar 3, 8:02 am, "Pete Fraser" <pfra...@covad.net> wrote:
Quote:
I've finally decided to buy a better simulator
(I've been making do with Modelsim XE so far).

Any thoughts as to the relative merits of Modelsim PE and
Active-HDL (PE) for FPGA simulation?

I can't say anything about the question you asked, but I can say that
I bought the entry level design package for Lattice since they don't
have a free version that can actually be used for work like Xilinx and
Altera do. I ordered the package that included ModelSim and that was
good for me since that is the only simulator I have used. But between
the time I sent in the order and the time when I licensed the tool,
they changed their agreements and started providing ActiveHDL! I
complained loudly but they would not provide a license for the tool I
had and would only send me the software for the new tool. So I gave
it a try and have hardly looked back.

My point is that it is very easy to switch and I am totally happy with
ActiveHDL. I can't think of anything about that I don't like other
than possibly the way it wants to create its own structure for your
files, but I finally figured out how to keep it from copying the
source files to it's own directory. I still don't know what the
difference between a design and a "workspace" is, but the Lattice
version only allows one design to a workspace. I don't seem to be
limited by that.

Rick

Dave
Guest

Wed Mar 03, 2010 4:54 pm   



We bought Active-HDL since they are offering Mixed Language (VHDL &
Verilog) simulation at an excellent price point.

Also, the Active-HDL gui is much nicer to use (especially the waveform
viewer) than Modelsim. Most likely since it is not TCL/TK based like
Modelsim (as far as I know).

I would vote for Active-HDL even if it was the same price as Modelsim.

Rob Gaddi
Guest

Wed Mar 03, 2010 6:38 pm   



On Wed, 3 Mar 2010 06:54:00 -0800 (PST)
Dave <doomeddave_at_yahoo.co.uk> wrote:

Quote:
We bought Active-HDL since they are offering Mixed Language (VHDL &
Verilog) simulation at an excellent price point.

Also, the Active-HDL gui is much nicer to use (especially the waveform
viewer) than Modelsim. Most likely since it is not TCL/TK based like
Modelsim (as far as I know).

I would vote for Active-HDL even if it was the same price as Modelsim.



My experience with both has been that I prefer Active-HDL. The GUI is
_much_ more polished; I found the ModelSim GUI to be an active
impediment to work.

In terms of the simulator itself I had serious problems (in both cases
dealing with the Xilinx libraries) with both Active-HDL, which I paid
for, and with ModelSim, which I evaled. For what it's worth I found
ModelSim's support to be more responsive.

--
Rob Gaddi, Highland Technology
Email address is currently out of order

d_s_klein
Guest

Thu Mar 04, 2010 12:42 am   



On Mar 3, 5:02 am, "Pete Fraser" <pfra...@covad.net> wrote:
Quote:
I've finally decided to buy a better simulator
(I've been making do with Modelsim XE so far).

Any thoughts as to the relative merits of Modelsim PE and
Active-HDL (PE) for FPGA simulation?

Thanks

Pete

One complaint I have about Active-HDL is that it insists on making a
copy of the sources and hiding them in a not so easy to find
location. It will then simulate these, and only these copies. If you
change a file while simulating, you have to remember to copy it out.
If you change something between simulations, you have to re-import it.

This "feature" makes the simulator mostly useful only *after* all the
bugs are fixed. (argh)


The ModelSim windows GUI is definitely getting worse with time. The
Linux GUI seems to be getting better though.

RK

rickman
Guest

Thu Mar 04, 2010 5:11 am   



On Mar 3, 5:42 pm, d_s_klein <d_s_kl...@yahoo.com> wrote:
Quote:
On Mar 3, 5:02 am, "Pete Fraser" <pfra...@covad.net> wrote:

I've finally decided to buy a better simulator
(I've been making do with Modelsim XE so far).

Any thoughts as to the relative merits of Modelsim PE and
Active-HDL (PE) for FPGA simulation?

Thanks

Pete

One complaint I have about Active-HDL is that it insists on making a
copy of the sources and hiding them in a not so easy to find
location.  It will then simulate these, and only these copies.  If you
change a file while simulating, you have to remember to copy it out.
If you change something between simulations, you have to re-import it.

This "feature" makes the simulator mostly useful only *after* all the
bugs are fixed.  (argh)

The ModelSim windows GUI is definitely getting worse with time.  The
Linux GUI seems to be getting better though.

RK

The copying of source files to a folder within the simulation
directory is the default, but you can override it. The "Add Files"
dialog box has a "Make Local Copy" checkbox which once you uncheck it,
seems to stay unchecked.

My most recent issue with ActiveHDL is how to copy a project. But I
finally figured out that "Save Design As" in the File menu does what I
want. Just "Save As" only seems to save the waveform file. I kept
looking under things titled "Workspace" which was not the ticket.

Rick

HT-Lab
Guest

Thu Mar 04, 2010 10:14 am   



"d_s_klein" <d_s_klein_at_yahoo.com> wrote in message
news:1f799796-32dd-4768-b66a-a935352c24f1_at_u19g2000prh.googlegroups.com...
On Mar 3, 5:02 am, "Pete Fraser" <pfra...@covad.net> wrote:
Quote:
I've finally decided to buy a better simulator
(I've been making do with Modelsim XE so far).

One complaint I have about Active-HDL is that it insists on making a
copy of the sources and hiding them in a not so easy to find
location. It will then simulate these, and only these copies. If you
change a file while simulating, you have to remember to copy it out.
If you change something between simulations, you have to re-import it.

This "feature" makes the simulator mostly useful only *after* all the
bugs are fixed. (argh)


The ModelSim windows GUI is definitely getting worse with time.

Yes, I found the same, however, when you install a new version of Modelsim the
registry keys are not overwritten so to preserve your GUI settings. I found that
deleting (or renaming) this entry fixes a lot of GUI instabilities. When you
restart Modelsim it automatically rebuilds them.

See: HKEY_CURRENT_USER\Software\Model Technology Incorporated\ModelSim

Hans
www.ht-lab.com

Raymund Hofmann
Guest

Thu Mar 04, 2010 5:55 pm   



On 3 Mrz., 14:02, "Pete Fraser" <pfra...@covad.net> wrote:
Quote:
Any thoughts as to the relative merits of Modelsim PE and
Active-HDL (PE) for FPGA simulation?

What about Systemverilog support?

To my last evaluation Aldec still lags considerably behind Mentor and
thus wasn't a option to me.

Andy Peters
Guest

Thu Mar 04, 2010 9:56 pm   



On Mar 3, 3:42 pm, d_s_klein <d_s_kl...@yahoo.com> wrote:
Quote:
On Mar 3, 5:02 am, "Pete Fraser" <pfra...@covad.net> wrote:

I've finally decided to buy a better simulator
(I've been making do with Modelsim XE so far).

Any thoughts as to the relative merits of Modelsim PE and
Active-HDL (PE) for FPGA simulation?

Thanks

Pete

One complaint I have about Active-HDL is that it insists on making a
copy of the sources and hiding them in a not so easy to find
location.  It will then simulate these, and only these copies.  If you
change a file while simulating, you have to remember to copy it out.
If you change something between simulations, you have to re-import it.

This "feature" makes the simulator mostly useful only *after* all the
bugs are fixed.  (argh)

As Rick says, when you choose "Add New File," there is a check-box for
"Make Local Copy," which if de-selected seems to get grayed out so you
can never select it again. However when this is deselect the project
does not copy the file and instead references it from wherever it
lives.

I find Aldec's forced directory structure to be rather stupid, and
it's really difficult to put it reasonably into a source-code control
system. It wants to put all of the scripts and configuration files
into its src directory, which of course breaks the cardinal rule
"don't put synthesizable sources and configuration files in the same
directory!" and it's got too many configuration files. ModelSim has
one project file (the .mpf) which is plain text and easily edited by
hand.

I think it's whole notion of workspaces is pretty useless, too. It has
a potential to be useful, in that you can put multiple designs in it.
Consider, for instance, a design which has a top-level source and
three lower-level sources. Of course you want some kind of test bench
for each lower-level source, and it would seem that creating a
"Design" for each in the workspace would work. But it doesn't. One
reason is that each design has a library associated with it (and the
default name is NOT work, but rather the design name). You cannot have
a library that is shared among all of the designs in a workspace.
Also, you can't call the work library for each design "work" -- they
have to have different names. This all matters if you are lazy like me
and you use direct instantiation of lower-level entities:

u_lower : entity work.lower port map (foo => foo, bar => bar);

I suppose the "right" thing to do in that case is to create a library
for each entity, analyze each into this library and instantiate from
it. This all assumes that your synthesis tool can support this.

Finally, I really like ModelSim's concept of "simulation
configurations." They're very easy -- you create a configuration, tell
it the top-level entity, set all of the generics and various other
things, and it's done. Click on the simulation configuration and off
you go. Sure, these things are nothing more than wrappers around the
vsim command but they're very handy. Active-HDL doesn't have this
feature, so the workaround is to create tcl scripts which call asim
with the proper command line.

So, yeah, Active-HDL is fine but if you are used to ModelSim's
features it can be confusing. I've spoken to Aldec's support folks
about the really fscking stupid forced directory structure, the
overabundance of configuration files and the lack of simulation
configurations. I don't know whether they will, or even can, change
some of this stuff without breaking existing projects, but as a paying
customer I guess I'm allowed to make suggestions.

-a

Martin Thompson
Guest

Fri Mar 05, 2010 11:34 am   



Andy Peters <google_at_latke.net> writes:

Quote:
ModelSim has one project file (the .mpf) which is plain text and
easily edited by hand.

Various others have also mentioned project files and workspaces and
the like...

Am I the only one that makes *no* use of the various "project things"
(either in Modelsim or Aldec)? I just have a makefile and use the GUI
to run the sim (from "their" command-line) and show me the waveforms.
I guess I don't like to be tied to a tool (as much as I can manage)
much as I don't like to be tied to a particular silicon vendor (as
much as I can manage :)

Am I missing something valuable, or is it just different?

Cheers,
Martin

--
martin.j.thompson_at_trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html

Dave
Guest

Fri Mar 05, 2010 1:24 pm   



Quote:
Am I the only one that makes *no* use of the various "project things"
(either in Modelsim or Aldec)?  I just have a makefile and use the GUI
to run the sim (from "their" command-line) and show me the waveforms.

I do the same so that makes at least two of us! Scripts are best for
source control, staying sane and having weekends free...

Petter Gustad
Guest

Fri Mar 05, 2010 2:23 pm   



Martin Thompson <martin.j.thompson_at_trw.com> writes:

Quote:
Am I the only one that makes *no* use of the various "project things"
(either in Modelsim or Aldec)? I just have a makefile and use the GUI

I almost always use my own set of command line tools to run the
simulation and eventually I use the waveform viewer for debugging.
I've been very happy with VCS in this regard.

I never use the bundled project or revision control stuff (I use
mostly git and/or svn).

Petter
--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?

rickman
Guest

Fri Mar 05, 2010 7:15 pm   



On Mar 5, 5:34 am, Martin Thompson <martin.j.thomp...@trw.com> wrote:
Quote:
Andy Peters <goo...@latke.net> writes:
ModelSim has one project file (the .mpf) which is plain text and
easily edited by hand.

Various others have also mentioned project files and workspaces and
the like...

Am I the only one that makes *no* use of the various "project things"
(either in Modelsim or Aldec)?  I just have a makefile and use the GUI
to run the sim (from "their" command-line) and show me the waveforms.
I guess I don't like to be tied to a tool (as much as I can manage)
much as I don't like to be tied to a particular silicon vendor (as
much as I can manage :)

Am I missing something valuable, or is it just different?

I doubt you are missing much of any real use. I find the GUI will
save me a lot of typing when instantiating modules. I use the
"generate test bench" feature to build a file with the meat and
potatoes in it and I copy that to the higher level module.

Otherwise if I was practiced in using make files with FPGA tools, I
would be likely be doing that too.

Rick

Andy Peters
Guest

Fri Mar 05, 2010 11:53 pm   



On Mar 5, 10:15 am, rickman <gnu...@gmail.com> wrote:
Quote:
On Mar 5, 5:34 am, Martin Thompson <martin.j.thomp...@trw.com> wrote:

Andy Peters <goo...@latke.net> writes:
ModelSim has one project file (the .mpf) which is plain text and
easily edited by hand.

Various others have also mentioned project files and workspaces and
the like...

Am I the only one that makes *no* use of the various "project things"
(either in Modelsim or Aldec)?  I just have a makefile and use the GUI
to run the sim (from "their" command-line) and show me the waveforms.
I guess I don't like to be tied to a tool (as much as I can manage)
much as I don't like to be tied to a particular silicon vendor (as
much as I can manage :)

Am I missing something valuable, or is it just different?

I doubt you are missing much of any real use.  I find the GUI will
save me a lot of typing when instantiating modules.  I use the
"generate test bench" feature to build a file with the meat and
potatoes in it and I copy that to the higher level module.

Otherwise if I was practiced in using make files with FPGA tools, I
would be likely be doing that too.

I don't use any of the Aldec tools that automatically generate test
benches or creating instances and all of that. Yes, I'm an emacs vhdl-
mode user and emacs does a fantabulous job of all of that.

Right now I'm working through the "best" way to set up projects within
the GUI, with an eye towards taking this and generating a Makefile or
a script or something.

It turns out that it is reasonable to create one workspace for an FPGA
project and within this workspace create a "design" for the
subentities and the top level. If you let it use the design name as
the working library for the design, then as long as you "use" the
library in a higher-level source, that source can see those other
libraries.

Now I'm thinking that the usual method of doing:

u_foo : entity work.foo port map (bar => bar, bletch => bletch);

might be better as:

u_foo : entity foo.foo port map (bar => bar, bletch => bletch);

The other option is to create a package with a component definition
for foo, and analyze that package into the foo library, so the
instantiation can be:

u_foo : foo port map (bar => bar, bletch => bletch);

I really don't know which is "better."

-a

KJ
Guest

Sat Mar 06, 2010 6:18 pm   



On Mar 5, 5:34 am, Martin Thompson <martin.j.thomp...@trw.com> wrote:
Quote:

Am I the only one that makes *no* use of the various "project things"
(either in Modelsim or Aldec)?  I just have a makefile and use the GUI
to run the sim (from "their" command-line) and show me the waveforms.
I guess I don't like to be tied to a tool (as much as I can manage)
much as I don't like to be tied to a particular silicon vendor (as
much as I can manage :)


But you're also running *their* commands to compile, run and view so
you're not really any more independent. Maintaining make files can be
a chore also, unless you use something to help you manage it...but
then you're now dependent on that tool as well.

Quote:
Am I missing something valuable, or is it just different?

Probably depends on which scenario is more likely to occur

1. Change sim tools
2. Add new developers (temporary, or because you move on to something
else in the company)

If #1 is prevalent, then maybe using other tools to help you manage
'make' is better. If #2 is more prevalent, then using the tool's
project system is probably better in easing the transition. If
neither is particularly likely...well...then it probably doesn't much
matter since one can probably be just as productive with various
approaches.

Kevin Jennings

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