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Measuring extremely low inductance values

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Piotr Wyderski
Guest

Mon Jan 07, 2019 9:45 pm   



Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

John Larkin
Guest

Mon Jan 07, 2019 9:45 pm   



On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
<peter.pan_at_neverland.mil> wrote:

Quote:
Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr


I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0


A mosfet gate is in fact complex at the gory detail level. Pin
inductance, pin capacitance, wire bond, and finally the chip itself.

RF VNAs can measure 1 nH. 1 nH is 160 ohms at 1 GHz.




--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Piotr Wyderski
Guest

Mon Jan 07, 2019 11:45 pm   



John Larkin wrote:

Quote:


Interesting idea, thanks!

Best regards, Piotr

Tim Williams
Guest

Mon Jan 07, 2019 11:45 pm   



"John Larkin" <jjlarkin_at_highland_snip_technology.com> wrote in message
news:l6d73e9nmri2469nuqrkidm63ivrttg43i_at_4ax.com...
Quote:
A mosfet gate is in fact complex at the gory detail level. Pin
inductance, pin capacitance, wire bond, and finally the chip itself.


You say that, and yet don't realize your own waveform shows a very simple
RLC network transient response!

So, they /can/ be complex, but pole-zero cancellation can also make it
simple. Seems like power transistors tend to be simpler, while old
transistors have "drool" (a diffusion 1/sqrt(f) property, indicative of an
unoptimized gate structure, versus a fractal shape, say).

2N7002 has a dominant pole /roughly/ around 10MHz or so, but doesn't run out
of power gain until some 100s MHz. The impedance is very low up there too.
That Cree gate in particular seems to be nothing more than an RC (however
since the R adds with the 50 ohm source resistance, it's not clear what its
ultimate bandwidth is -- additional measurements are needed).

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

speff
Guest

Mon Jan 07, 2019 11:45 pm   



On Monday, 7 January 2019 15:07:58 UTC-5, Piotr Wyderski wrote:
Quote:
Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr


Maybe something like a Agilent 4285A with 1pH resolution, plus a lot of thinking about custom test fixtures.

--Spehro Pefhany

Tim Williams
Guest

Tue Jan 08, 2019 12:45 am   



"Piotr Wyderski" <peter.pan_at_neverland.mil> wrote in message
news:q10lgg$10a$1_at_node2.news.atman.pl...
Quote:
Tim Williams wrote:

As mentioned, a VNA can do that.

But how do you know what you're measuring? Is it your
pure L or some disributed parasitics? Any practical
way to disentangle them?


What do you want to measure? Calibrate to that standard, and there you go.

For example, you might measure the _difference_ in inductance due to the
part itself, as compared to a shorting bar in the same location.

Or you might look at the inductance due to the package and length, in which
case you need a stub that's shorted as closely as possible at *just before*
the package leads; then, subtracting that from the measurement with the
package plus its body length and the return path beneath it.


Quote:
Doesn't the probe add so many unknowns that the result is meaningless?
How to do it properly?


Nah, probe don't mean shit. The loop impedance is tiny, ohms. My probe is,
low kohms at that frequency I think. :-)

A better question is where to ground to. In that circuit, I had multiple
layers (not that that actually matters) of ground, so comparing against
"infinite ground" is reasonable. The probe tip comes in perpendicular to
the board, away from most of the fields, which are internal to the board and
components. So, I have reasonable confidence that I can, in fact, measure
the waveform progressively along the total loop inductance, at least within
the, say, 20% ballpark I was interested in.


Quote:
Once upon a time my scope was able to make a TinySwitch flyback stutter,
and it was merely 100kHz and some hundreds of microhenries.


Bad scope?? I don't understand.

My scope is 350MHz, and about 200MHz would be adequate for the loop I was
measuring. So, my Tek 475 would do just as well, though its trace intensity
would be awful for that particular measurement, and it also doesn't have a
MEAS menu...

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

Piotr Wyderski
Guest

Tue Jan 08, 2019 12:45 am   



Tim Williams wrote:

> As mentioned, a VNA can do that.

But how do you know what you're measuring? Is it your
pure L or some disributed parasitics? Any practical
way to disentangle them?

Quote:
It can also be measured by following the transient amplitude around the
loop.


Doesn't the probe add so many unknowns that the result is meaningless?
How to do it properly?

Once upon a time my scope was able to make a TinySwitch flyback stutter,
and it was merely 100kHz and some hundreds of microhenries.

Best regards, Piotr

Tim Williams
Guest

Tue Jan 08, 2019 12:45 am   



Basically, the inductance due to the package/body length.

As mentioned, a VNA can do that. The LF equivalent may not necessarily
follow from high frequency measurements, or be very accurate if measured
directly.

It can be measured in situ by determining the switching loop time constant.

It can also be measured by following the transient amplitude around the
loop.

I did this on a recent power supply, where the switching loop was a 0612
current sense resistor, two 3x3mm DFN8 FETs, a 2512 +V-side jumper, and some
1206 bypass caps. I followed the switching transient peak around the loop,
and measured...

Quote:
Loop inductance (C540, R526, R504, R525, Q502) ~5nH
Q502 drain to ground inductance: ~1.6nH
Q502 source to ground inductance: ~0.5nH


I don't have any waveforms handy unfortunately.

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

"Piotr Wyderski" <peter.pan_at_neverland.mil> wrote in message
news:q10bip$nai$1_at_node2.news.atman.pl...
Quote:
Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr


Phil Hobbs
Guest

Tue Jan 08, 2019 1:45 am   



On 1/7/19 5:49 PM, Tim Williams wrote:
Quote:
Basically, the inductance due to the package/body length.

As mentioned, a VNA can do that.  The LF equivalent may not necessarily
follow from high frequency measurements, or be very accurate if measured
directly.

It can be measured in situ by determining the switching loop time constant.

It can also be measured by following the transient amplitude around the
loop.

I did this on a recent power supply, where the switching loop was a 0612
current sense resistor, two 3x3mm DFN8 FETs, a 2512 +V-side jumper, and
some 1206 bypass caps.  I followed the switching transient peak around
the loop, and measured...

Loop inductance (C540, R526, R504, R525, Q502) ~5nH
Q502 drain to ground inductance: ~1.6nH
Q502 source to ground inductance: ~0.5nH

I don't have any waveforms handy unfortunately.

Tim


I did that sort of thing measuring Uber's diode laser drivers (code name
Fuji). The total inductance of the laser + FET + 0402 storage cap was
under 400 pH--not bad going at all.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

George Herold
Guest

Tue Jan 08, 2019 3:45 am   



On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
Quote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0

That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?

George H.
(Who bought some fast gates to make a tdr, but is doing other stuff.)


Quote:


A mosfet gate is in fact complex at the gory detail level. Pin
inductance, pin capacitance, wire bond, and finally the chip itself.

RF VNAs can measure 1 nH. 1 nH is 160 ohms at 1 GHz.




--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com


John Larkin
Guest

Tue Jan 08, 2019 5:45 am   



On Mon, 7 Jan 2019 18:04:13 -0800 (PST), George Herold
<gherold_at_teachspin.com> wrote:

Quote:
On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0
That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?


The big flat part is the 50 ohm hardline cable between the sampling
head and the fet.

Then a couple of inductances, then the series resistance of the gate
and then the gate capacitance. SiC fets tend to have largish series
gate resistances.

A longer time base shows the gross gate capacitance better.

https://www.dropbox.com/s/h4sr4bp3yprcdpg/Cree_TDR_Slow.JPG?dl=0


What I sometimes do is make a Spice TDR and fiddle a fet model until
it looks like the measured TDR.


Quote:

George H.
(Who bought some fast gates to make a tdr, but is doing other stuff.)




A mosfet gate is in fact complex at the gory detail level. Pin
inductance, pin capacitance, wire bond, and finally the chip itself.

RF VNAs can measure 1 nH. 1 nH is 160 ohms at 1 GHz.


Actually, 6 ohms.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

Jeroen Belleman
Guest

Tue Jan 08, 2019 10:45 am   



speff wrote:
Quote:
On Monday, 7 January 2019 15:07:58 UTC-5, Piotr Wyderski wrote:
Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

Maybe something like a Agilent 4285A with 1pH resolution, plus a lot of thinking about custom test fixtures.

--Spehro Pefhany


I don't think that's very useful. Impedances, when closely
looked at, are always some combination of R, L, C and delays.
There is really no reasonable way to work that out with an
Agilent 4285A-like instrument, however precise.

TDR or VNA is really the the right solution here. I believe
VNAs yield better results. I get much cleaner TDR plots from
a VNA and an inverse FFT than from a straight TDR. The VNA
also makes de-embedding set-up parasitics much easier. There
is no objective reason why that couldn't be done with a TDR
as well, but it isn't common.

Jeroen Belleman

George Herold
Guest

Tue Jan 08, 2019 3:45 pm   



On Monday, January 7, 2019 at 11:41:22 PM UTC-5, John Larkin wrote:
Quote:
On Mon, 7 Jan 2019 18:04:13 -0800 (PST), George Herold
gherold_at_teachspin.com> wrote:

On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0
That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?


The big flat part is the 50 ohm hardline cable between the sampling
head and the fet.
Oh sure, silly of me.

Then a couple of inductances, then the series resistance of the gate
and then the gate capacitance. SiC fets tend to have largish series
gate resistances.

A longer time base shows the gross gate capacitance better.

https://www.dropbox.com/s/h4sr4bp3yprcdpg/Cree_TDR_Slow.JPG?dl=0

Some day I have to get my hands on a tdr to play with.
I don't have any great need though.

George H.
Quote:


What I sometimes do is make a Spice TDR and fiddle a fet model until
it looks like the measured TDR.



George H.
(Who bought some fast gates to make a tdr, but is doing other stuff.)




A mosfet gate is in fact complex at the gory detail level. Pin
inductance, pin capacitance, wire bond, and finally the chip itself.

RF VNAs can measure 1 nH. 1 nH is 160 ohms at 1 GHz.

Actually, 6 ohms.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics


Phil Hobbs
Guest

Tue Jan 08, 2019 4:45 pm   



On 1/7/19 5:31 PM, Tim Williams wrote:
Quote:
"John Larkin" <jjlarkin_at_highland_snip_technology.com> wrote in message
news:l6d73e9nmri2469nuqrkidm63ivrttg43i_at_4ax.com...
A mosfet gate is in fact complex at the gory detail level. Pin
inductance, pin capacitance, wire bond, and finally the chip itself.


You say that, and yet don't realize your own waveform shows a very
simple RLC network transient response!

So, they /can/ be complex, but pole-zero cancellation can also make it
simple.  Seems like power transistors tend to be simpler, while old
transistors have "drool" (a diffusion 1/sqrt(f) property, indicative of
an unoptimized gate structure, versus a fractal shape, say).

2N7002 has a dominant pole /roughly/ around 10MHz or so, but doesn't run
out of power gain until some 100s MHz.  The impedance is very low up
there too. That Cree gate in particular seems to be nothing more than an
RC (however since the R adds with the 50 ohm source resistance, it's not
clear what its ultimate bandwidth is -- additional measurements are
needed).

Tim


The SD-24 TDR head only puts out a few hundred millivolts. Fets start
doing complicated things at a few volts.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
https://hobbs-eo.com

George Herold
Guest

Tue Jan 08, 2019 4:45 pm   



On Tuesday, January 8, 2019 at 10:14:47 AM UTC-5, Phil Hobbs wrote:
Quote:
On 1/8/19 9:04 AM, George Herold wrote:
On Monday, January 7, 2019 at 11:41:22 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 18:04:13 -0800 (PST), George Herold
gherold_at_teachspin.com> wrote:

On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0
That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?


The big flat part is the 50 ohm hardline cable between the sampling
head and the fet.
Oh sure, silly of me.

Then a couple of inductances, then the series resistance of the gate
and then the gate capacitance. SiC fets tend to have largish series
gate resistances.

A longer time base shows the gross gate capacitance better.

https://www.dropbox.com/s/h4sr4bp3yprcdpg/Cree_TDR_Slow.JPG?dl=0
Some day I have to get my hands on a tdr to play with.
I don't have any great need though.

George H.

They've been showing up on eBay for under a grand, including the
mainframe and one or more SD-24 TDR heads.


OK, I can't buy one at work unless I can point to some need.
And for home... well next year I'll have two kids in college.
The LDP (local domestic product) will be negative for a couple
of years.

George H.
Quote:
Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
https://hobbs-eo.com


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