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Measuring extremely low inductance values

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John Larkin
Guest

Tue Jan 08, 2019 4:45 pm   



On Mon, 7 Jan 2019 16:31:51 -0600, "Tim Williams"
<tiwill_at_seventransistorlabs.com> wrote:

Quote:
"John Larkin" <jjlarkin_at_highland_snip_technology.com> wrote in message
news:l6d73e9nmri2469nuqrkidm63ivrttg43i_at_4ax.com...
A mosfet gate is in fact complex at the gory detail level. Pin
inductance, pin capacitance, wire bond, and finally the chip itself.


You say that, and yet don't realize your own waveform shows a very simple
RLC network transient response!


That's insulting. And it's not really simple, unless you plan to
design slow stuff.

Quote:

So, they /can/ be complex, but pole-zero cancellation can also make it
simple. Seems like power transistors tend to be simpler, while old
transistors have "drool" (a diffusion 1/sqrt(f) property, indicative of an
unoptimized gate structure, versus a fractal shape, say).

2N7002 has a dominant pole /roughly/ around 10MHz or so, but doesn't run out
of power gain until some 100s MHz. The impedance is very low up there too.
That Cree gate in particular seems to be nothing more than an RC (however
since the R adds with the 50 ohm source resistance, it's not clear what its
ultimate bandwidth is -- additional measurements are needed).

Tim


The Cree fets have significant internal gate resistance, visible on
the TDR. The approximate C is obvious too. Rg is kinda distributed, so
the gate isn't exactly a lumped R-C, but adding a bit of external
series inductance can peak it up usefully.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

Phil Hobbs
Guest

Tue Jan 08, 2019 4:45 pm   



On 1/8/19 9:04 AM, George Herold wrote:
Quote:
On Monday, January 7, 2019 at 11:41:22 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 18:04:13 -0800 (PST), George Herold
gherold_at_teachspin.com> wrote:

On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0
That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?


The big flat part is the 50 ohm hardline cable between the sampling
head and the fet.
Oh sure, silly of me.

Then a couple of inductances, then the series resistance of the gate
and then the gate capacitance. SiC fets tend to have largish series
gate resistances.

A longer time base shows the gross gate capacitance better.

https://www.dropbox.com/s/h4sr4bp3yprcdpg/Cree_TDR_Slow.JPG?dl=0
Some day I have to get my hands on a tdr to play with.
I don't have any great need though.

George H.


They've been showing up on eBay for under a grand, including the
mainframe and one or more SD-24 TDR heads.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
https://hobbs-eo.com

Phil Hobbs
Guest

Tue Jan 08, 2019 5:45 pm   



On 1/8/19 10:39 AM, George Herold wrote:
Quote:
On Tuesday, January 8, 2019 at 10:14:47 AM UTC-5, Phil Hobbs wrote:
On 1/8/19 9:04 AM, George Herold wrote:
On Monday, January 7, 2019 at 11:41:22 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 18:04:13 -0800 (PST), George Herold
gherold_at_teachspin.com> wrote:

On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0
That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?


The big flat part is the 50 ohm hardline cable between the sampling
head and the fet.
Oh sure, silly of me.

Then a couple of inductances, then the series resistance of the gate
and then the gate capacitance. SiC fets tend to have largish series
gate resistances.

A longer time base shows the gross gate capacitance better.

https://www.dropbox.com/s/h4sr4bp3yprcdpg/Cree_TDR_Slow.JPG?dl=0
Some day I have to get my hands on a tdr to play with.
I don't have any great need though.

George H.

They've been showing up on eBay for under a grand, including the
mainframe and one or more SD-24 TDR heads.


OK, I can't buy one at work unless I can point to some need.
And for home... well next year I'll have two kids in college.
The LDP (local domestic product) will be negative for a couple
of years.

George H.


Understood. I had two in college for five years out of ten. They all
graduated debt free though!

A TDR would be useful for superconducting inductance measurements. ;)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
https://hobbs-eo.com

speff
Guest

Tue Jan 08, 2019 6:45 pm   



On Tuesday, 8 January 2019 10:52:10 UTC-5, Phil Hobbs wrote:
Quote:
On 1/8/19 10:39 AM, George Herold wrote:
On Tuesday, January 8, 2019 at 10:14:47 AM UTC-5, Phil Hobbs wrote:
On 1/8/19 9:04 AM, George Herold wrote:
On Monday, January 7, 2019 at 11:41:22 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 18:04:13 -0800 (PST), George Herold
gherold_at_teachspin.com> wrote:

On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0
That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?


The big flat part is the 50 ohm hardline cable between the sampling
head and the fet.
Oh sure, silly of me.

Then a couple of inductances, then the series resistance of the gate
and then the gate capacitance. SiC fets tend to have largish series
gate resistances.

A longer time base shows the gross gate capacitance better.

https://www.dropbox.com/s/h4sr4bp3yprcdpg/Cree_TDR_Slow.JPG?dl=0
Some day I have to get my hands on a tdr to play with.
I don't have any great need though.

George H.

They've been showing up on eBay for under a grand, including the
mainframe and one or more SD-24 TDR heads.


OK, I can't buy one at work unless I can point to some need.
And for home... well next year I'll have two kids in college.
The LDP (local domestic product) will be negative for a couple
of years.

George H.

Understood. I had two in college for five years out of ten. They all
graduated debt free though!

A TDR would be useful for superconducting inductance measurements. ;)

Cheers

Phil Hobbs


If it would just work through a <100kHz pi filter..

John Larkin
Guest

Tue Jan 08, 2019 7:45 pm   



On Tue, 8 Jan 2019 09:43:58 -0800 (PST), speff <spehro_at_gmail.com>
wrote:

Quote:
On Tuesday, 8 January 2019 10:52:10 UTC-5, Phil Hobbs wrote:
On 1/8/19 10:39 AM, George Herold wrote:
On Tuesday, January 8, 2019 at 10:14:47 AM UTC-5, Phil Hobbs wrote:
On 1/8/19 9:04 AM, George Herold wrote:
On Monday, January 7, 2019 at 11:41:22 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 18:04:13 -0800 (PST), George Herold
gherold_at_teachspin.com> wrote:

On Monday, January 7, 2019 at 3:28:54 PM UTC-5, John Larkin wrote:
On Mon, 7 Jan 2019 21:07:50 +0100, Piotr Wyderski
peter.pan_at_neverland.mil> wrote:

Hi All,

this time this is out of pure curiosity, with no intention
or need to build a real device: many parts, particularly MOSFETs are
specified as "low parasitic inductance", but the values given
are insanely small. So, how do they measure 1nH? Or is it the
result of a FEM simulation?

Best regards, Piotr

I use TDR to measure things like that.

https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0
That is awesome, I see a long RC thing. Is the boxy thing
in front a capacitance? or something else?


The big flat part is the 50 ohm hardline cable between the sampling
head and the fet.
Oh sure, silly of me.

Then a couple of inductances, then the series resistance of the gate
and then the gate capacitance. SiC fets tend to have largish series
gate resistances.

A longer time base shows the gross gate capacitance better.

https://www.dropbox.com/s/h4sr4bp3yprcdpg/Cree_TDR_Slow.JPG?dl=0
Some day I have to get my hands on a tdr to play with.
I don't have any great need though.

George H.

They've been showing up on eBay for under a grand, including the
mainframe and one or more SD-24 TDR heads.


OK, I can't buy one at work unless I can point to some need.
And for home... well next year I'll have two kids in college.
The LDP (local domestic product) will be negative for a couple
of years.

George H.

Understood. I had two in college for five years out of ten. They all
graduated debt free though!

A TDR would be useful for superconducting inductance measurements. ;)

Cheers

Phil Hobbs


If it would just work through a <100kHz pi filter..


People sometimes assume that TDR is a graph of impedance vs distance.
Often it sort of is. But every piece of the path affects everything
downstream, twice.

It's easy to fool TDR, and there are cases that no math can untangle.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

Tim Williams
Guest

Tue Jan 08, 2019 10:45 pm   



"John Larkin" <jjlarkin_at_highlandtechnology.com> wrote in message
news:1ag93el6cotqs1m5hsgj274j1fh30i4c8d_at_4ax.com...
Quote:

That's insulting. And it's not really simple, unless you plan to
design slow stuff.


I thought for sure you had seen this before; I guess not, in which case my
sincerest apologies.
https://www.seventransistorlabs.com/Images/C2M0280120_TDR_Fit.png

That was a curve fit to your data; it shows a simple RC.

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

John Larkin
Guest

Wed Jan 09, 2019 5:45 am   



On Tue, 8 Jan 2019 15:42:53 -0600, "Tim Williams"
<tiwill_at_seventransistorlabs.com> wrote:

Quote:
"John Larkin" <jjlarkin_at_highlandtechnology.com> wrote in message
news:1ag93el6cotqs1m5hsgj274j1fh30i4c8d_at_4ax.com...

That's insulting. And it's not really simple, unless you plan to
design slow stuff.

I thought for sure you had seen this before; I guess not, in which case my
sincerest apologies.
https://www.seventransistorlabs.com/Images/C2M0280120_TDR_Fit.png

That was a curve fit to your data; it shows a simple RC.

Tim


Well, there are the initial inductive bumps.

Cree has the full, nonlinear device model, with inductances, but they
got the substrate diode very wrong.

The TDR pulse is only 0.5 volts, so it doesn't excite the large-signal
nonlinearities.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

Tim Williams
Guest

Wed Jan 09, 2019 2:45 pm   



"John Larkin" <jjlarkin_at_highlandtechnology.com> wrote in message
news:jgra3el032nj3u35jt4cdlaqpsgs4a0fg5_at_4ax.com...
> Well, there are the initial inductive bumps.

Easily attributed to mismatch -- the component leads have a much higher TL
impedance for the 1-2cm length there. Which causes CM-diff mode conversion
so the whole thing rings a bit.

Here's a more exaggerated case, measured with a 10cm twisted pair hanging
off a BNC-binding post connector:
https://www.seventransistorlabs.com/Images/FQA9N90C_Gate_TDR.png
Same squiggles, still inconsequential to the measurement. (This case also
seems to have a dominant RC equivalent.) Tried to model it, think it's the
wrong equivalent though (R||L||C in series, R+L+C in parallel is probably
the correct equivalent).


Quote:
Cree has the full, nonlinear device model, with inductances, but they
got the substrate diode very wrong.

The TDR pulse is only 0.5 volts, so it doesn't excite the large-signal
nonlinearities.


SiC diodes are pretty awful, but so are non-primitive SPICE models, so
often...

Y'ever seen an MOV model before? The formulas they use are a nightmare.

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

John Larkin
Guest

Wed Jan 09, 2019 5:45 pm   



On Wed, 9 Jan 2019 06:49:05 -0600, "Tim Williams"
<tiwill_at_seventransistorlabs.com> wrote:

Quote:
"John Larkin" <jjlarkin_at_highlandtechnology.com> wrote in message
news:jgra3el032nj3u35jt4cdlaqpsgs4a0fg5_at_4ax.com...
Well, there are the initial inductive bumps.

Easily attributed to mismatch -- the component leads have a much higher TL
impedance for the 1-2cm length there. Which causes CM-diff mode conversion
so the whole thing rings a bit.

Here's a more exaggerated case, measured with a 10cm twisted pair hanging
off a BNC-binding post connector:
https://www.seventransistorlabs.com/Images/FQA9N90C_Gate_TDR.png
Same squiggles, still inconsequential to the measurement. (This case also
seems to have a dominant RC equivalent.) Tried to model it, think it's the
wrong equivalent though (R||L||C in series, R+L+C in parallel is probably
the correct equivalent).


Cree has the full, nonlinear device model, with inductances, but they
got the substrate diode very wrong.

The TDR pulse is only 0.5 volts, so it doesn't excite the large-signal
nonlinearities.

SiC diodes are pretty awful, but so are non-primitive SPICE models, so
often...

Y'ever seen an MOV model before? The formulas they use are a nightmare.

Tim


The Cree model shows 15 nH of gate inductance and 9 nH of source
inductance. In my HV pulser, I'm putting a couple of amps into the
gate with 1-2 ns edges, and I'm switching 12 amps in a few ns. Those
translate into 10s of volts of L di/dt. I'm amazed it works at all.

The limit on gate drive is blowing it up, which I have done. These
people have specified abs max gate voltages right on the eve of
destruction.

The chip itself is tiny and pretty far from the pins.

https://www.dropbox.com/s/hnu2b7qlfw98bwq/Cree_Chip.JPG?dl=0

It's actually a terrible package for fast work. Two or three smaller
parts in parallel might be better.







--

John Larkin Highland Technology, Inc

lunatic fringe electronics

Tim Williams
Guest

Thu Jan 10, 2019 1:45 am   



"John Larkin" <jjlarkin_at_highlandtechnology.com> wrote in message
news:735c3elfbeigt3hnedl5v62s6ett8qbvgi_at_4ax.com...
Quote:
The chip itself is tiny and pretty far from the pins.

https://www.dropbox.com/s/hnu2b7qlfw98bwq/Cree_Chip.JPG?dl=0

It's actually a terrible package for fast work. Two or three smaller
parts in parallel might be better.


That RF transistors exist, in TO-220 and 247 and other gnarly packages, is
remarkable.

I remember reading the datasheet for a a low-VHF RF final in TO-220. The
s-params go all the way around the circle at the intended operating
frequency. Yikes.

I remember seeing a Microsemi MOSFET module (half bridge) that was rated up
to _200kHz_. What's the freaking point? It cost ten times more than the
equivalent rating in TO-247s, and contained as much internal stray
inductance as two TO-247s in series. The mind boggles.

IGBTs are now fast enough that they _have_ to worry about that, and so most
new IGBT modules are, you know, actually made right, with laminated bus bar
construction.

Power GaN is almost only available in DFN and CSBGA, as it must. That
anyone even thinks they want one in TO-220... yeesh!

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

George Herold
Guest

Thu Jan 10, 2019 3:45 am   



On Wednesday, January 9, 2019 at 7:25:10 PM UTC-5, Tim Williams wrote:
Quote:
"John Larkin" <jjlarkin_at_highlandtechnology.com> wrote in message
news:735c3elfbeigt3hnedl5v62s6ett8qbvgi_at_4ax.com...
The chip itself is tiny and pretty far from the pins.

https://www.dropbox.com/s/hnu2b7qlfw98bwq/Cree_Chip.JPG?dl=0

It's actually a terrible package for fast work. Two or three smaller
parts in parallel might be better.


That RF transistors exist, in TO-220 and 247 and other gnarly packages, is
remarkable.

My* Rubidium lamp (~70 MHz, ~1.5W) is a coil/auto-transformer, cap
and 'gnarly package' RF power npn, AFAICT they are made in Russia.

George H.
*mostly copied from an Rb freq. standard company with their
blessing, they stopped making the lamp with no US supplier.
We were buying lamps from them, I think mostly as a favor.
(We had an old atomic physicist (oap), who knew their oap.)


Quote:

I remember reading the datasheet for a a low-VHF RF final in TO-220. The
s-params go all the way around the circle at the intended operating
frequency. Yikes.

I remember seeing a Microsemi MOSFET module (half bridge) that was rated up
to _200kHz_. What's the freaking point? It cost ten times more than the
equivalent rating in TO-247s, and contained as much internal stray
inductance as two TO-247s in series. The mind boggles.

IGBTs are now fast enough that they _have_ to worry about that, and so most
new IGBT modules are, you know, actually made right, with laminated bus bar
construction.

Power GaN is almost only available in DFN and CSBGA, as it must. That
anyone even thinks they want one in TO-220... yeesh!

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/


John Larkin
Guest

Thu Jan 10, 2019 7:45 pm   



On Wed, 9 Jan 2019 18:24:59 -0600, "Tim Williams"
<tiwill_at_seventransistorlabs.com> wrote:

Quote:
"John Larkin" <jjlarkin_at_highlandtechnology.com> wrote in message
news:735c3elfbeigt3hnedl5v62s6ett8qbvgi_at_4ax.com...
The chip itself is tiny and pretty far from the pins.

https://www.dropbox.com/s/hnu2b7qlfw98bwq/Cree_Chip.JPG?dl=0

It's actually a terrible package for fast work. Two or three smaller
parts in parallel might be better.


That RF transistors exist, in TO-220 and 247 and other gnarly packages, is
remarkable.


In an RF amp, you can tune out/resonate the parasitics. Some RF ldmos
fets have deliberate wire-bond inductances that optimize for some
specific RF band.

We work wideband, time domain, so we want low inductances. The tuned
RF fets are useless to us.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com


Guest

Thu Jan 10, 2019 8:45 pm   



2 pi f l .... 1Ghz and 1 NH cancel out.... 6.2 "ohms"

John Larkin
Guest

Thu Jan 10, 2019 9:45 pm   



On Thu, 10 Jan 2019 11:39:53 -0800 (PST), bulegoge_at_columbus.rr.com
wrote:

>2 pi f l .... 1Ghz and 1 NH cancel out.... 6.2 "ohms"

Right. I corrected that a few days ago.

It's 1 pF that's 160 ohms at 1 GHz.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

John Miles, KE5FX
Guest

Sun Jan 13, 2019 9:45 am   



On Monday, January 7, 2019 at 12:28:54 PM UTC-8, John Larkin wrote:
Quote:
https://www.dropbox.com/s/v51gna10uwwfarc/Cree_TDR_Hardline.JPG?dl=0

https://www.dropbox.com/s/sgqwyhdzs90bnki/Cree_TDR_Fast.JPG?dl=0


That's such a nifty plot that I couldn't resist adding one of those
to an outgoing DigiKey order:

http://www.ke5fx.com/Cree_TDR_lg.gif
http://www.ke5fx.com/Cree_TDR_photo.jpg

Same features visible at similar detail with a 50 GHz sweeper and a
(SD-32?) sampling head. Guess ol' Joseph F. knew what he was talking
about after all.

-- john, KE5FX

Goto page Previous  1, 2, 3  Next

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