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low noise amplifier for high impedance source

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Mikko S Kiviranta
Guest

Wed Oct 18, 2006 2:40 pm   



Winfield Hill <Winfield_member_at_newsguy.com> wrote:
: Can you explain your plot? Does the 0.58nV/rt-Hz annotation mean your
: measured input noise with a 10-ohm source? That's pretty good, much
: better than Philips claims. The 1/f frequency looks like about 1.5kHz.

No, each annotation refers to the gridline underneath it. The white
noise is between the 0.58nV and 1.2nV gridlines, pretty close to the
specified 0.8 nV/rtHz.

: Judging from the 1M rolloff above 5kHz, it looks like your amplifier
: has about 32pF of effective input capacitance. That means the 50kHz
: 150k region is also somewhat attenuated.

Thanks for noticing this. I didn't pay that much attenuation to the
1Mohm trace (it tells hardly anything about the current noise which I'd be
interested in), but now I see there is something funny in that measurement.
The 130kohm trace shows (in another plot) -3dB point perhaps at 100kHz
whose implied Cin=12pF is not compatible with the 1Mohm figure.

: Hmm, the Johnson noise for a 150k resistance is about 50nV, yet your
: bottom-middle annotation is 1.2nV, so I guess I really don't at all
: understand your annotation scheme.

It's a parallel connection of the 150k load and the 1M gate bias
resistor, i.e. 130k actually. The trace lies between the 73nV and 37nV
gridlines.

: What was your amplifier's voltage gain? We can't do much with your
: data plots without knowing that.

That's about 175 V/V, the annotations take this into account (i.e.
they are input-referred).

An interesting detail is the surprisingly high high-pass frequency,
which is due to the dc-blocking cap at the output. I tried the
ultra-high capacitance density ceramic from Murata, the 10uF GRM31
type. Did not expect much of it, but their impedance plot
http://www.24.fi/kiviranta/murata_grm31_z-theta.gif didn't look
too bad so gave one a try. It took some amount of detective work
and a hint from a colleaque before I noticed that their capacitance
value collapses when there is a dc biac voltage present across them.
http://www.24.fi/kiviranta/murata_grm31_biased.gif . Be warned!

Regards,
Mikko

Uwe Bonnes
Guest

Wed Oct 18, 2006 10:41 pm   



Mikko S Kiviranta <Okkim.Atnarivik_at_fi.iki.invalid> wrote:
....

Quote:
An interesting detail is the surprisingly high high-pass frequency,
which is due to the dc-blocking cap at the output. I tried the
ultra-high capacitance density ceramic from Murata, the 10uF GRM31
type. Did not expect much of it, but their impedance plot
http://www.24.fi/kiviranta/murata_grm31_z-theta.gif didn't look
too bad so gave one a try. It took some amount of detective work
and a hint from a colleaque before I noticed that their capacitance
value collapses when there is a dc biac voltage present across them.
http://www.24.fi/kiviranta/murata_grm31_biased.gif . Be warned!

Do you have any high capacitance X5R/X7R capacitors and can you post
diagramms like the above for these X5R/X7R capacitors?

Thanks
--
Uwe Bonnes bon_at_elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Creator
Guest

Wed Oct 18, 2006 11:35 pm   



archiees_at_gmail.com wrote:
Quote:
Hello everyone,
I am a student who has been working on a low noise preamplifier for a
high impedance current source. I have put the model of the detection
circuit here:
http://img146.imageshack.us/img146/9748/detectmodelid8.jpg
Its a differential ac current source with an instrinsic capacitance ~
20pF on each side. I use 1M ohm resistors to bias my input JFETs.
The bandwidth i need is only from 10 Khz to couple of MHz.
In my learning process, i have realized few things such as selecting
JFETs as my input transistors for low leekage hence low input current
noise. Maximise the value of input resistor without disturbing the bias
of the input JFETs. However i still have couple of unanswered
questions:
1. How does the Cin of the JFETs effect the signal to noise. do i have
to match the input capacitance of the JFETs to the source capacitance
for minimum noise? How about if i put multiple JFETs in parallel to
reduce input voltage noise - do i have to revise my JFETs selection in
terms of input capacitance?
2. While evaluating the performance of the designed amplifier can i
neglect the equivalent input current noise, as i am using the JFETs?
3. Are there any good review articles or texts for low noise
preamplifier design (for capacitive sensors).
Please help!
thanks
-arch


Creator
Guest

Wed Oct 18, 2006 11:58 pm   



Hello, my pour Student
At first: you need to rceive enough information about physics of noise
for JFETs. We have two separate processes and different
solutions,namely: for low current noise you have to reduce area to get
small input current so current noise varys with root (i can not
remember exactly)from Input current. So you should take transistor with
Igs <1.0*10-12A. In this case you can solve problem with input capacity
of JFET because capacity of your sensor and Cgs make form capacitance
divider. For low voltage noise you must encrease Lg and therefore Cgs.
If you want to use parallel transistor your en will reduce as root from
quantity of transistors. Go ahead.
archiees_at_gmail.com wrote:
Quote:
Hello everyone,
I am a student who has been working on a low noise preamplifier for a
high impedance current source. I have put the model of the detection
circuit here:
http://img146.imageshack.us/img146/9748/detectmodelid8.jpg
Its a differential ac current source with an instrinsic capacitance ~
20pF on each side. I use 1M ohm resistors to bias my input JFETs.
The bandwidth i need is only from 10 Khz to couple of MHz.
In my learning process, i have realized few things such as selecting
JFETs as my input transistors for low leekage hence low input current
noise. Maximise the value of input resistor without disturbing the bias
of the input JFETs. However i still have couple of unanswered
questions:
1. How does the Cin of the JFETs effect the signal to noise. do i have
to match the input capacitance of the JFETs to the source capacitance
for minimum noise? How about if i put multiple JFETs in parallel to
reduce input voltage noise - do i have to revise my JFETs selection in
terms of input capacitance?
2. While evaluating the performance of the designed amplifier can i
neglect the equivalent input current noise, as i am using the JFETs?
3. Are there any good review articles or texts for low noise
preamplifier design (for capacitive sensors).
Please help!
thanks
-arch



Guest

Thu Oct 19, 2006 3:41 am   



Quote:
If I understood correctly, you apply potential across plates and measure
current through your experiment? If that's the case, what is potential
value? It will be very hard to measure so low signal and have wide
bandwidth. I would suggest having a tuned circuit for frequencies of
interest and in addition, lockin amp after fet preamp. Reduced bandwidth
would help with noise problem.

Hi Sinisa,
thanks for the suggestions. The induced current is in higher pA range.
I agree that using tuned circuit will help if i am trying to detect
signal due to few ions (infact Gerald Gabrielse does use tuned circuits
to pick up signals induced by single protons over at Harvard). However
for my application which is a mass specectrometer you only know a range
of frequencies where your unknown sample ions will have - in essence we
want to do a broadband (10KHz to 1MHz) detection.

There are amps from Burr Brown (TI) that work
Quote:
in sub pA range, although questionable if it would work on 4K. Could keep
them warm by heating PCB.
Yes, i was suggested using JFETs and warm these up to 70 kelvin (just

to turn them ON) inside the cryogenic vacuum system. I am going to try
it as i realize, getting bigger GaAs MESFETs (with low 1/f noise) which
work fine at 4 kelvin is not working out.

You could use differrent preamp boards for
Quote:
different experiments or make it adjustable so you could tune it for
frequency of interest. In addition, you could match impedance of your amp to
experiment.
We did thought about it, if i can find a way to tune the preamplifier

impedance which sits in a vacuum system, externally. Still, it will be
something i want to try in future, for now i want to see what is the
best i can do in broadband detection mode using low noise JFETs.
thanks again.
Regards,
Arch

Mikko S Kiviranta
Guest

Mon Oct 23, 2006 7:40 am   



Uwe Bonnes <bon_at_hertz.ikp.physik.tu-darmstadt.de> wrote:
: Do you have any high capacitance X5R/X7R capacitors and can you post
: diagramms like the above for these X5R/X7R capacitors?

For a 2.2uF 10V X7R cap in 1206 case, the type AVX CM316X7R225K10AT
see http://www.24.fi/kiviranta/AVX_CM316X7R_2U2_Z-theta.gif ,
AVX_CM316X7R_2U2_Unbiased.gif and AVX_CM316X7R_2U2_5VBiased.gif .

The 5V dc bias has no obvious effect.

Regards,
Mikko

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