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bitrex
Guest

Tue Jan 10, 2017 11:49 pm   



Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf

It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.

George Herold
Guest

Tue Jan 10, 2017 11:49 pm   



On Tuesday, January 10, 2017 at 12:31:42 PM UTC-5, bitrex wrote:
Quote:
On 01/10/2017 12:29 PM, bitrex wrote:
On 01/10/2017 11:56 AM, Phil Hobbs wrote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf



It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


I notice they've made the assumption that the transistors are ideal
"transconductance generators" in the patent. Would the problem you
mention become apparent if one were to run the math with a model
treating them at the very least as having a realistic diffusion
capacitance between base and emitter?

For the application I have in mind, the negative capacitance would just
have to make a load look resistive at a fairly low freq, like maybe 400 Hz.


Can you describe more? I can't imagine an application where tuning
out the capacitance matters at 400 Hz. (Unless it's some huge C)

George H.

George Herold
Guest

Tue Jan 10, 2017 11:49 pm   



On Tuesday, January 10, 2017 at 1:27:44 PM UTC-5, bitrex wrote:
Quote:
On 01/10/2017 01:01 PM, George Herold wrote:
On Tuesday, January 10, 2017 at 12:31:42 PM UTC-5, bitrex wrote:
On 01/10/2017 12:29 PM, bitrex wrote:
On 01/10/2017 11:56 AM, Phil Hobbs wrote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf



It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


I notice they've made the assumption that the transistors are ideal
"transconductance generators" in the patent. Would the problem you
mention become apparent if one were to run the math with a model
treating them at the very least as having a realistic diffusion
capacitance between base and emitter?

For the application I have in mind, the negative capacitance would just
have to make a load look resistive at a fairly low freq, like maybe 400 Hz.

Can you describe more? I can't imagine an application where tuning
out the capacitance matters at 400 Hz. (Unless it's some huge C)

George H.


Sure, I had an idea that it might be possible to null the capacitance of
large sheets/strips of EL material so that they present an essentially
resistive load to the inverter/TRIAC. They can't be dimmed using
ordinary PWM driven into a TRIAC because the phase lag screws up the
triggering.

The patent above looked like a simple few jellybean transistor to create
a grounded negative C. There are other ways to accomplish dimming, like
zero-crossing detecting the drive voltage, some kind of MOSFET wrapped
in a bridge rectifier driver (I don't understand it?), or linearly
regulating the low voltage input to the inverter (inefficient, have to
use one inverter per panel.)

But it will certainly be no use if it oscillates.


How about an inductor in a Zobel type network?
https://en.wikipedia.org/wiki/Boucherot_cell

It'll waste power. (I think)

George H.

Phil Hobbs
Guest

Tue Jan 10, 2017 11:56 pm   



On 01/10/2017 11:49 AM, bitrex wrote:
Quote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf


It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

Jim Thompson
Guest

Wed Jan 11, 2017 12:07 am   



On Tue, 10 Jan 2017 11:56:47 -0500, Phil Hobbs
<pcdhSpamMeSenseless_at_electrooptical.net> wrote:

Quote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf


It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


It's an audiophoolery farce... run the math.

Note that it's an application. Has a patent actually issued?

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

bitrex
Guest

Wed Jan 11, 2017 12:29 am   



On 01/10/2017 11:56 AM, Phil Hobbs wrote:
Quote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf


It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


I notice they've made the assumption that the transistors are ideal
"transconductance generators" in the patent. Would the problem you
mention become apparent if one were to run the math with a model
treating them at the very least as having a realistic diffusion
capacitance between base and emitter?

bitrex
Guest

Wed Jan 11, 2017 12:31 am   



On 01/10/2017 12:29 PM, bitrex wrote:
Quote:
On 01/10/2017 11:56 AM, Phil Hobbs wrote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf



It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


I notice they've made the assumption that the transistors are ideal
"transconductance generators" in the patent. Would the problem you
mention become apparent if one were to run the math with a model
treating them at the very least as having a realistic diffusion
capacitance between base and emitter?


For the application I have in mind, the negative capacitance would just
have to make a load look resistive at a fairly low freq, like maybe 400 Hz.

bitrex
Guest

Wed Jan 11, 2017 12:38 am   



On 01/10/2017 12:07 PM, Jim Thompson wrote:
Quote:
On Tue, 10 Jan 2017 11:56:47 -0500, Phil Hobbs
pcdhSpamMeSenseless_at_electrooptical.net> wrote:

On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf


It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs

It's an audiophoolery farce... run the math.

Note that it's an application. Has a patent actually issued?

...Jim Thompson


It looks like something related was granted in 2012, but its fee status
is listed as "Lapsed" ;-)

<https://www.google.com/patents/US8228120?dq=Amplifiers+with+negative+capacitance+circuits&hl=en&sa=X&ved=0ahUKEwjlg7LmjrjRAhWG0YMKHS_yBNQQ6AEIKjAC>

bitrex
Guest

Wed Jan 11, 2017 1:27 am   



On 01/10/2017 01:01 PM, George Herold wrote:
Quote:
On Tuesday, January 10, 2017 at 12:31:42 PM UTC-5, bitrex wrote:
On 01/10/2017 12:29 PM, bitrex wrote:
On 01/10/2017 11:56 AM, Phil Hobbs wrote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf



It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


I notice they've made the assumption that the transistors are ideal
"transconductance generators" in the patent. Would the problem you
mention become apparent if one were to run the math with a model
treating them at the very least as having a realistic diffusion
capacitance between base and emitter?

For the application I have in mind, the negative capacitance would just
have to make a load look resistive at a fairly low freq, like maybe 400 Hz.

Can you describe more? I can't imagine an application where tuning
out the capacitance matters at 400 Hz. (Unless it's some huge C)

George H.


Sure, I had an idea that it might be possible to null the capacitance of
large sheets/strips of EL material so that they present an essentially
resistive load to the inverter/TRIAC. They can't be dimmed using
ordinary PWM driven into a TRIAC because the phase lag screws up the
triggering.

The patent above looked like a simple few jellybean transistor to create
a grounded negative C. There are other ways to accomplish dimming, like
zero-crossing detecting the drive voltage, some kind of MOSFET wrapped
in a bridge rectifier driver (I don't understand it?), or linearly
regulating the low voltage input to the inverter (inefficient, have to
use one inverter per panel.)

But it will certainly be no use if it oscillates.

bitrex
Guest

Wed Jan 11, 2017 1:28 am   



On 01/10/2017 01:27 PM, bitrex wrote:
Quote:
On 01/10/2017 01:01 PM, George Herold wrote:
On Tuesday, January 10, 2017 at 12:31:42 PM UTC-5, bitrex wrote:
On 01/10/2017 12:29 PM, bitrex wrote:
On 01/10/2017 11:56 AM, Phil Hobbs wrote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf




It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source
capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple
transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain
slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


I notice they've made the assumption that the transistors are ideal
"transconductance generators" in the patent. Would the problem you
mention become apparent if one were to run the math with a model
treating them at the very least as having a realistic diffusion
capacitance between base and emitter?

For the application I have in mind, the negative capacitance would just
have to make a load look resistive at a fairly low freq, like maybe
400 Hz.

Can you describe more? I can't imagine an application where tuning
out the capacitance matters at 400 Hz. (Unless it's some huge C)

George H.


Sure, I had an idea that it might be possible to null the capacitance of
large sheets/strips of EL material so that they present an essentially
resistive load to the inverter/TRIAC. They can't be dimmed using
ordinary PWM driven into a TRIAC because the phase lag screws up the
triggering.


That is to say, use it as essentially a form of active PFC.

John Larkin
Guest

Wed Jan 11, 2017 2:09 am   



On Tue, 10 Jan 2017 11:49:01 -0500, bitrex
<bitrex_at_de.lete.earthlink.net> wrote:

Quote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf

It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


That is pretty cool, a potential replacement for a varicap. Varicaps
can be a real pain.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Jim Thompson
Guest

Wed Jan 11, 2017 2:19 am   



On Tue, 10 Jan 2017 11:49:01 -0500, bitrex
<bitrex_at_de.lete.earthlink.net> wrote:

Quote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf

It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents.


[snip]

Can you show us the math behind your conclusion, "It looks like...." ?

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Jeff Liebermann
Guest

Wed Jan 11, 2017 2:56 am   



On Tue, 10 Jan 2017 12:38:48 -0500, bitrex
<bitrex_at_de.lete.earthlink.net> wrote:

Quote:
It looks like something related was granted in 2012, but its fee status
is listed as "Lapsed" ;-)

https://www.google.com/patents/US8228120?dq=Amplifiers+with+negative+capacitance+circuits&hl=en&sa=X&ved=0ahUKEwjlg7LmjrjRAhWG0YMKHS_yBNQQ6AEIKjAC


Nope. Go thee unto:
<https://www.google.com/patents/US20090243720>
and scroll down to the bottom under "Legal Events". Fees were paid on
July 4, 2014 (does the patent office really work on July 4th?). On
Mar 22, 2016, it looks like Intersil changed patent attorneys and
ownership was transfered. Looks very much alive to me, although still
an application.

--
Jeff Liebermann jeffl_at_cruzio.com
150 Felker St #D http://www.LearnByDestroying.com
Santa Cruz CA 95060 http://802.11junk.com
Skype: JeffLiebermann AE6KS 831-336-2558

Phil Hobbs
Guest

Wed Jan 11, 2017 3:11 am   



On 01/10/2017 02:09 PM, John Larkin wrote:
Quote:
On Tue, 10 Jan 2017 11:49:01 -0500, bitrex
bitrex_at_de.lete.earthlink.net> wrote:

Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf

It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.

That is pretty cool, a potential replacement for a varicap. Varicaps
can be a real pain.


Reactance modulators have been around for a long time. They're
generally crap because the amplifier is too slow and noisy to do a good
job at it.

If you replace the output transistor with a diff pair, you could make a
negative-capacitance varactor, which would be neat, I agree. You could
even make its bias stable by running the diff pair as an exponentiator,
so that the extra DC gets dumped to ground but the rest of the circuit
sees a constant value.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

boB
Guest

Wed Jan 11, 2017 3:53 am   



On Tue, 10 Jan 2017 10:53:43 -0800 (PST), George Herold
<gherold_at_teachspin.com> wrote:

Quote:
On Tuesday, January 10, 2017 at 1:27:44 PM UTC-5, bitrex wrote:
On 01/10/2017 01:01 PM, George Herold wrote:
On Tuesday, January 10, 2017 at 12:31:42 PM UTC-5, bitrex wrote:
On 01/10/2017 12:29 PM, bitrex wrote:
On 01/10/2017 11:56 AM, Phil Hobbs wrote:
On 01/10/2017 11:49 AM, bitrex wrote:
Saw this interesting circuit while trolling around on patent sites
looking for inspiration:

https://docs.google.com/viewer?url=patentimages.storage.googleapis.com/pdfs/US20090243720.pdf



It looks like the negative capacitance is proportional to the
transconductance of "Qn2", i.e. proportional to the bias currents. In
the patent they seem to be using it to null the gate/source capacitance
on the MOSFET output stage of power amps.

Is anyone aware of any similar topologies for grounded negative
capacitances? I've seen some other topologies using a couple transistors
but they all seemed to require transformers on the input port.

It might be useful to have a circuit like that where the negative
capacitance was proportional to a control voltage.


I'm surprised that you could patent that in 2009.

The usual negative capacitor is a noninverting amp with a gain slightly
larger than unity, and a cap connected from output to + input.

They're very rarely useful, because any phase lag gives the input a
negative conductance as well as susceptance, so unless the amp is way
faster than what you're connecting it to, it'll oscillate before the
total capacitance goes away.

(I did use one last year, but that's almost a first.)

Cheers

Phil Hobbs


I notice they've made the assumption that the transistors are ideal
"transconductance generators" in the patent. Would the problem you
mention become apparent if one were to run the math with a model
treating them at the very least as having a realistic diffusion
capacitance between base and emitter?

For the application I have in mind, the negative capacitance would just
have to make a load look resistive at a fairly low freq, like maybe 400 Hz.

Can you describe more? I can't imagine an application where tuning
out the capacitance matters at 400 Hz. (Unless it's some huge C)

George H.


Sure, I had an idea that it might be possible to null the capacitance of
large sheets/strips of EL material so that they present an essentially
resistive load to the inverter/TRIAC. They can't be dimmed using
ordinary PWM driven into a TRIAC because the phase lag screws up the
triggering.

The patent above looked like a simple few jellybean transistor to create
a grounded negative C. There are other ways to accomplish dimming, like
zero-crossing detecting the drive voltage, some kind of MOSFET wrapped
in a bridge rectifier driver (I don't understand it?), or linearly
regulating the low voltage input to the inverter (inefficient, have to
use one inverter per panel.)

But it will certainly be no use if it oscillates.

How about an inductor in a Zobel type network?
https://en.wikipedia.org/wiki/Boucherot_cell

It'll waste power. (I think)

George H.


Sort of reminds me of Gyrators (simulated inductor) or a Negative
impedance converter we used in graphic equalizers in the 1970s.


boB

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