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elektroda.net NewsGroups Forum Index - LSI - **interconnect simulation**

Guest

Sat Feb 24, 2007 9:40 am

I want to do monte carlo simulation on width and tickness of an

interconnect. How can i simulate interconnect in spice and variation

on that?

Guest

Tue Apr 24, 2007 9:54 pm

On 24 Feb., 10:42, "mina" <mina13...@yahoo.ca> wrote:

I want to do monte carlo simulation on width and tickness of an

interconnect. How can i simulate interconnect in spice and variation

on that?

interconnect. How can i simulate interconnect in spice and variation

on that?

You will have to model the interconnection as a network of R and C

(and also possible L and G) elements like the "professional" layout

extractors does. If a device design guide is available for the process

you are using, there should be some guidelines on how to calculate the

parasitic resistance and capacitance to other layers. I have not seen

any process with statistical data on interconnects. Since you model an

interconnect with resistors and capacitors, it would be possible to

create the model circuit such that a variance can be applied. Problem

is just to get the data and what probability density function to use.

I don't know if metal process variation is gaussian.

If you are using spectre simulator there is a chapter dedicated to

Monte-carlo in the advanced analysis user manual.

--

Svenn

elektroda.net NewsGroups Forum Index - LSI - **interconnect simulation**