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How to convert a bit signal to std_logic?

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fl
Guest

Sun Dec 17, 2017 12:43 am   



Hi,

This is a self exercise. It is in a test bench I want to signal 'clk' to
a clock signal in a component. On the web one close answer is about convert
an integer to std_logic_vector. It also mentions it can apply to 1 bit.
Unfortunately it is not successful for me to convert bit to std_logic.

Can you help me?


Thanks,




signal clk: bit;
signal clk_logic: std_logic;

begin

clk_logic <= std_logic(clk); -- wrong

end

rickman
Guest

Sun Dec 17, 2017 4:04 am   



fl wrote on 12/16/2017 5:43 PM:
Quote:
Hi,

This is a self exercise. It is in a test bench I want to signal 'clk' to
a clock signal in a component. On the web one close answer is about convert
an integer to std_logic_vector. It also mentions it can apply to 1 bit.
Unfortunately it is not successful for me to convert bit to std_logic.

Can you help me?


Thanks,




signal clk: bit;
signal clk_logic: std_logic;

begin

clk_logic <= std_logic(clk); -- wrong

end


Try to_std_logic(clk)

--

Rick C

Viewed the eclipse at Wintercrest Farms,
on the centerline of totality since 1998

elektroda.net NewsGroups Forum Index - VHDL Language - How to convert a bit signal to std_logic?

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