Samrat V
Guest
Fri Feb 05, 2010 2:57 pm
Design of E1/T1 transmitter and receiver...
mike
Guest
Fri Feb 05, 2010 6:17 pm
start with
module
endmodule
On Feb 5, 7:57 am, Samrat V <samratv...@gmail.com> wrote:
> Design of E1/T1 transmitter and receiver...
John_H
Guest
Fri Feb 05, 2010 8:43 pm
On Feb 5, 7:57 am, Samrat V <samratv...@gmail.com> wrote:
Quote:
Design of E1/T1 transmitter and receiver...
Learn what an E1/T1 transmitter/receiver is.
Learn what speeds you'll be working with.
Discover what framing is and how it's implemented in the E1/T1 link.
Find out what you need to do with data once you receive and transmit.
Also, do you know about FPGAs and ASICs yet?
The E1/T1 link is only a carrier. What's in the data is dependent
upon application.
LittleAlex
Guest
Tue Feb 09, 2010 11:59 pm
On Feb 5, 8:17 am, mike <gosenator...@hotmail.com> wrote:
Quote:
start with
module
endmodule
On Feb 5, 7:57 am, Samrat V <samratv...@gmail.com> wrote:
Design of E1/T1 transmitter and receiver...
No, no, no. That's not right. You should start with:
module T1E1_transmitter ()
endmodule
module T1E1_receiver ()
endmodule
Are you trying to send Mr. Samrat V down the wrong path?
AL
mike
Guest
Wed Feb 10, 2010 5:29 pm
On Feb 9, 4:59 pm, LittleAlex <alex.lo...@email.com> wrote:
Quote:
On Feb 5, 8:17 am, mike <gosenator...@hotmail.com> wrote:
start with
module
endmodule
On Feb 5, 7:57 am, Samrat V <samratv...@gmail.com> wrote:
Design of E1/T1 transmitter and receiver...
No, no, no. That's not right. You should start with:
module T1E1_transmitter ()
endmodule
module T1E1_receiver ()
endmodule
Are you trying to send Mr. Samrat V down the wrong path?
Al
I refused to provide the full solution ... I was just giving pointers
to direct him down the proper path. Mr. Samrat must learn how to apply
the "module" concept himself.
Mike
