"Global Variables" for configuration in VHDL

Hi,

i have the following (maybe strange) problem:

My design is very modular and will be configured by a setup file
(pkg)! This setup file defines wether specific modules are generated
or not.

For a special reason only the generated modules should now become an
individual (increasing) number as an address, e.g. in a generic! This
is only for configuration!!

I am thinking of a kind of a function with a "Global Variable" there,
which is intialized (to 0) at the beginning and increased by one every
time a module is instanciated (the function called)!! This is easy in
a procedural language but i can not find any construction in VHDL,
which could do this.

function NextAddress() return integer is
  global variable addr : integer := 0;
 begin
   addr := addr+1;
   return addr;
 end;

I know this function does not work, but do you know a solution?
I already thought of shared variables, pointers (are these supported
in synthesis?) and File I/O. But nothing works?

Thanks ahead for any clue
Peter

Hi,

i have the following (maybe strange) problem:

My design is very modular and will be configured by a setup file
(pkg)! This setup file defines wether specific modules are generated
or not.

For a special reason only the generated modules should now become an
individual (increasing) number as an address, e.g. in a generic! This
is only for configuration!!

I am thinking of a kind of a function with a "Global Variable" there,
which is intialized (to 0) at the beginning and increased by one every
time a module is instanciated (the function called)!! This is easy in
a procedural language but i can not find any construction in VHDL,
which could do this.

function NextAddress() return integer is
  global variable addr : integer := 0;
 begin
   addr := addr+1;
   return addr;
 end;

I know this function does not work, but do you know a solution?
I already thought of shared variables, pointers (are these supported
in synthesis?) and File I/O. But nothing works?

Thanks ahead for any clue
Peter

I use for every module a specific function which evaluates, by
scanning my setupfile, a unique number, which is used as an address.
Unfortunately this gets very, very complicated and i thought of a much
simpler solution based on when (!) a module is instantiated!?
Is this possible?

I'm not sure I totally understand what you want, but I'm assuming the
following:
- The 'setup file' that defines wether specific modules are generated
or not is also a VHDL file.
Yes! Its a package file!
- The list of module addresses that come out are supposed to be
constants for a given setup file.
Also Yes!

Given those assumptions, one approach would be:
- Have the 'setup file' be a simple list of flags in a vector.  For
example, if the universe is a list of five modules that may (or may
not) be included, then you would have a five element vector with '1'
or '0' in a particular location to indicate that the item should be
included.
Ex:
  constant List_Of_Modules_Included: std_ulogic_vector(1 to 5) :> "10110";

- Now create a function that takes an input vector and creates a
vector of addresses.
Ex:
  type arr_integer is array(integer range <>) of integer;
  ...
  function Create_Addresses(V: std_ulogic_vector) return arr_integer
is
    variable RetVal:  arr_integer(V'range);
    variable Start_Address: integer := 0; -- Or whatever initial value
  begin
    for i in V'range loop
      if (V(i) = '1') then
        RetVal(i) := Start_Address;
        Start_Address := Start_Address + 1;
      else
        RetVal(i) := 0; -- Presuming unused can be any address
      end if;
    end loop;
    return(RetVal);
  end function Create_Addresses;

Now you can create your addresses like this...
  constant List_Of_Addresses: arr_integer :> Create_Addresses(List_Of_Modules_Included);

Not sure just how you then want to use these addresses, but at least
this should get you started on a possible approach.

Kevin Jennings

What are you actually trying to do? are you trying to created the
address map at elaboration time?

I use for every module a specific function which evaluates, by
scanning my setupfile, a unique number, which is used as an address.
Unfortunately this gets very, very complicated and i thought of a much
simpler solution based on when (!) a module is instantiated!?
Is this possible?

A vhdl "setup file" is called a package.
These work fine with any kind of vhdl design unit.

Your package might want to contain a constant array of vectors
to be used directly by your module. Maybe something like the example below.

    -- Mike Treseler

_____________________________

library ieee;
use ieee.std_logic_1164.all;

package adr_decode is
    constant reg_len_c    : positive := 16;
    constant array_len_c  : positive := 16;
    subtype reg_t is std_logic_vector(reg_len_c-1 downto 0);
    type regs_t is array (0 to array_len_c-1) of reg_t;
    constant mem_size : natural := 2**add_length;
    type     mem_t is array (mem_size-1 downto 0) of
       std_logic_vector (data_length-1 downto 0);
    constant mem : mem_t := (0      => x"abcd", 1  => x"beef",
                             2      => x"5555", 3  => x"1010",
                             4      => x"5a6b", 5  => x"f0f0",
                             6      => x"1234", 7  => x"fabc",
                             8      => x"2345", 9  => x"9876",
                             10     => x"5432", 11 => x"6666",
                             12     => x"0101", 13 => x"abab",
                             others => x"4247");
end package adr_decode;

Hi Kevin,

thanks for your elaborated answer!
I think, your proposal is actually what i am doing right now.
I use for every module a specific function which evaluates, by
scanning my setupfile, a unique number, which is used as an address.

Unfortunately this gets very, very complicated and i thought of a much
simpler solution

based on when (!) a module is instanciated!?
Is this possible?

What exactly do you mean by "scanning my setupfile"?  To me, that
sounds like you're literally reading some file from disk (the setup
file), parsing that file, performing some function on the parsed data
to create an address...if that's what you're doing, you're making
things very difficult on yourself

Hi all,

On 13 Jul., 02:15, KJ <kkjenni...@sbcglobal.net> wrote:

What exactly do you mean by "scanning my setupfile"?  To me, that
sounds like you're literally reading some file from disk (the setup
file), parsing that file, performing some function on the parsed data
to create an address...if that's what you're doing, you're making
things very difficult on yourself

No, its not a file from disk but simply a VHDL package which contains
constant vectors, which define my modules with versionnumbers!
I think very similar to your proposal!?
See here an excerpt from my code:
------------------------------------------------------

type N_Vers is array ( NATURAL RANGE <> ) of integer;
constant Module_A: N_Vers := (8,0,1,0,2,2,0,0,0);
constant Module_B: N_Vers := (0);
constant Module_C: N_Vers := (2,0,0);
...
-- this is part of my setupfile
-- the first element of the constants are the number of modules of
that type, the other numbers are the according versions of that
type!...

-- Now these special functions "NextAddress.." (also in a pkg) take
care of the address calculation, similar to this:

function NextAddress_A(pos: integer) return integer is
begin
        return pos; -- this is easy, because Module_A is the first module
type in the chain
end;

function NextAddress_B(pos: integer) return integer is
begin
        return Module_A(0)+pos;
end;

function NextAddress_C(pos: integer) return integer is
begin
        return Module_A(0)+Module_B(0)+pos; -- things getting more and more
complicated!
end;

...

-- finally here the mdoules according the setup constants are
generated

 gen_Module_A : for i in 1 to Module_A(0) generate
   iModule_A : entity work.ModuleA
     generic map (Address => NextAddressA(i),
                 (Version => Module_A(i))
     port map(...)
 end generate;

  gen_Module_B : for i in 1 to Module_B(0) generate
   iModule_B : entity work.ModuleB
     generic map (Address => NextAddressB(i),
                 (Version => Module_B(i))
     port map(...)
 end generate;

  gen_Module_C : for i in 1 to Module_C(0) generate
   iModule_C : entity work.ModuleC
     generic map (Address => NextAddressC(i),
                 (Version => Module_C(i))
     port map(...)
 end generate;

 ...

------------------------------------------------------

I think you get the idea!

The code above is very simplified, because i don't have to generate
not only addresses but also other numbers, which are dependent on the
versionnumbers of the modules!

So i have to write for each module, according functions, which do the
calculations!
Now imagine i want to change my code, e.g. i remove Module_B, then ALL
the dependent functions have to be changed also!!

I simply search for another solution, where the calculation can be
done in the Modules itself and this is not depended on other modules
(or functions) but simply on the fact of beeing instanciated or not!
My thinking was of a kind of "global variable", which is simply
incremented
So there would be only one function "NextAddress" be needed, similar
to this:

function NextAddress() return integer is
        global variable pos: integer := 0; this is the initialization of the
variable
begin
        pos := pos +1;
        return pos;
end;

But nothingh like this seems to be possible in VHDL!?

My thinking was also of writing out the number+1 to a file and read it
back, whenever the function is called, but i learned that file
read&write in VHDL is not possible??

Peter von Walter

Hi all,

On 13 Jul., 02:15, KJ <kkjenni...@sbcglobal.net> wrote:

What exactly do you mean by "scanning my setupfile"?  To me, that
sounds like you're literally reading some file from disk (the setup
file), parsing that file, performing some function on the parsed data
to create an address...if that's what you're doing, you're making
things very difficult on yourself

No, its not a file from disk but simply a VHDL package which contains
constant vectors, which define my modules with versionnumbers!
I think very similar to your proposal!?
See here an excerpt from my code:
------------------------------------------------------

type N_Vers is array ( NATURAL RANGE <> ) of integer;
constant Module_A: N_Vers := (8,0,1,0,2,2,0,0,0);
constant Module_B: N_Vers := (0);
constant Module_C: N_Vers := (2,0,0);
...
-- this is part of my setupfile
-- the first element of the constants are the number of modules of
that type, the other numbers are the according versions of that
type!...

-- Now these special functions "NextAddress.." (also in a pkg) take
care of the address calculation, similar to this:

function NextAddress_A(pos: integer) return integer is
begin
        return pos; -- this is easy, because Module_A is the first module
type in the chain
end;

function NextAddress_B(pos: integer) return integer is
begin
        return Module_A(0)+pos;
end;

function NextAddress_C(pos: integer) return integer is
begin
        return Module_A(0)+Module_B(0)+pos; -- things getting more and more
complicated!
end;

...

-- finally here the mdoules according the setup constants are
generated

 gen_Module_A : for i in 1 to Module_A(0) generate
   iModule_A : entity work.ModuleA
     generic map (Address => Module_A_Address(i),
                 (Version => Module_A(i))
     port map(...)
 end generate;

So i have to write for each module, according functions, which do the
calculations!

Now imagine i want to change my code, e.g. i remove Module_B, then ALL
the dependent functions have to be changed also!!

I simply search for another solution, where the calculation can be
done in the Modules itself and this is not depended on other modules
(or functions) but simply on the fact of beeing instanciated or not!
My thinking was of a kind of "global variable", which is simply
incremented

So there would be only one function "NextAddress" be needed, similar
to this:

function NextAddress() return integer is
        global variable pos: integer := 0; this is the initialization of the
variable
begin
        pos := pos +1;
        return pos;
end;

But nothingh like this seems to be possible in VHDL!?

My thinking was also of writing out the number+1 to a file and read it
back, whenever the function is called, but i learned that file
read&write in VHDL is not possible??

That approach would not be a good path to go down.

Give this a go and let us know what happens.

On 14 Jul., 11:24, Tricky <trickyh...@gmail.com> wrote:
        impure function NextAddress return integer is
        begin
                pos := pos +1;
                return pos;
        end function NextAddress;

Hi all,

On 13 Jul., 02:15, KJ <kkjenni...@sbcglobal.net> wrote:

What exactly do you mean by "scanning my setupfile"?  To me, that
sounds like you're literally reading some file from disk (the setup
file), parsing that file, performing some function on the parsed data
to create an address...if that's what you're doing, you're making
things very difficult on yourself

No, its not a file from disk but simply a VHDL package which contains
constant vectors, which define my modules with versionnumbers!
I think very similar to your proposal!?
See here an excerpt from my code:
------------------------------------------------------

type N_Vers is array ( NATURAL RANGE <> ) of integer;
constant Module_A: N_Vers := (8,0,1,0,2,2,0,0,0);
constant Module_B: N_Vers := (0);
constant Module_C: N_Vers := (2,0,0);
...
-- this is part of my setupfile
-- the first element of the constants are the number of modules of
that type, the other numbers are the according versions of that
type!...

-- Now these special functions "NextAddress.." (also in a pkg) take
care of the address calculation, similar to this:

function NextAddress_A(pos: integer) return integer is
begin
        return pos; -- this is easy, because Module_A is the first module
type in the chain
end;

function NextAddress_B(pos: integer) return integer is
begin
        return Module_A(0)+pos;
end;

function NextAddress_C(pos: integer) return integer is
begin
        return Module_A(0)+Module_B(0)+pos; -- things getting more and more
complicated!
end;

...

-- finally here the mdoules according the setup constants are
generated

 gen_Module_A : for i in 1 to Module_A(0) generate
   iModule_A : entity work.ModuleA
     generic map (Address => NextAddressA(i),
                 (Version => Module_A(i))
     port map(...)
 end generate;

  gen_Module_B : for i in 1 to Module_B(0) generate
   iModule_B : entity work.ModuleB
     generic map (Address => NextAddressB(i),
                 (Version => Module_B(i))
     port map(...)
 end generate;

  gen_Module_C : for i in 1 to Module_C(0) generate
   iModule_C : entity work.ModuleC
     generic map (Address => NextAddressC(i),
                 (Version => Module_C(i))
     port map(...)
 end generate;

 ...

------------------------------------------------------

I think you get the idea!

The code above is very simplified, because i don't have to generate
not only addresses but also other numbers, which are dependent on the
versionnumbers of the modules!

So i have to write for each module, according functions, which do the
calculations!
Now imagine i want to change my code, e.g. i remove Module_B, then ALL
the dependent functions have to be changed also!!

I simply search for another solution, where the calculation can be
done in the Modules itself and this is not depended on other modules
(or functions) but simply on the fact of beeing instanciated or not!
My thinking was of a kind of "global variable", which is simply
incremented
So there would be only one function "NextAddress" be needed, similar
to this:

function NextAddress() return integer is
        global variable pos: integer := 0; this is the initialization of the
variable
begin
        pos := pos +1;
        return pos;
end;

But nothingh like this seems to be possible in VHDL!?

My thinking was also of writing out the number+1 to a file and read it
back, whenever the function is called, but i learned that file
read&write in VHDL is not possible??

Peter von Walter

On 14 Jul., 15:34, pvwa <vwal...@physi.uni-heidelberg.de> wrote:

On 14 Jul., 11:24, Tricky <trickyh...@gmail.com> wrote:
        impure function NextAddress return integer is
        begin
                pos := pos +1;
                return pos;
        end function NextAddress;

If i remove the keyword impure it gives me this warning:

WARNING: HDLParsers:3310 - "C:/VHDL/TestSharedVariable/
TestModules.vhd" Line 25. Function NextAddress is not pure.  VHDL 87
allowed this; VHDL 93 requires the keyword IMPURE.

So what's going on?