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I/O switching speed of Xilinx spartan 6 or Altera EP4CE10 [ Goto pageGoto page: 1, 2 ] kristoff21 / 2Thu Jan 19, 2017 2:49 pm kristoff
Terminating an Aurora link in a PC Guest4 / 2Wed Jan 18, 2017 7:52 am Guest
VHDL I2c burst read Guest6 / 10Sat Jan 14, 2017 12:28 pm Guest
Slightly OT: Digital watch circuits [ Goto pageGoto page: 1, 2 ] Tim Wescott21 / 20Fri Jan 06, 2017 12:16 am Kevin Neilson
ISERDES2 divide factor jonpry3 / 375Wed Jan 04, 2017 10:08 pm Guest
Custom timing on Altera Cyclone V GX dev board Rick C. Hodgin10 / 34Fri Dec 30, 2016 5:42 pm Rick C. Hodgin
True Random Number Gen in Virtex 7 Kevin Neilson3 / 16Fri Dec 30, 2016 2:12 am Tim Wescott
Christmas is about Jesus Christ Rick C. Hodgin1 / 15Sun Dec 25, 2016 6:34 am Rick C. Hodgin
Quad-Port BlockRAM in Virtex [ Goto pageGoto page: 1, 2 ] Kevin Neilson19 / 238Wed Dec 21, 2016 2:09 am Kevin Neilson
Go to church today Rick C. Hodgin1 / 14Sun Dec 18, 2016 5:44 am Rick C. Hodgin
Linux OS for FPGA worth Cecil Bayona4 / 29Thu Dec 15, 2016 4:07 am Jon Elson
The TimingAnalyzer (Timing Diagrams and Analysis) timinganalyzer3 / 42Wed Dec 07, 2016 8:17 pm Guest
Help finding Xilinx software for HW-130 programmer Tim Regeant6 / 127Wed Dec 07, 2016 1:47 am Tim Regeant
Phrasing! [ Goto pageGoto page: 1, 2, 3 ] Kevin Neilson39 / 119Sat Dec 03, 2016 8:44 pm Jan Coombs
SD card emulation Sri G7 / 30Fri Dec 02, 2016 6:55 pm rickman
Programming Problem [ Goto pageGoto page: 1, 2 ] rickman17 / 76Wed Nov 30, 2016 2:58 am rickman
Tools on Linux Tim Wescott9 / 50Tue Nov 22, 2016 9:59 pm Theo Markettos
Mentor bought by Siemens HT-Lab4 / 42Thu Nov 17, 2016 3:35 pm David Brown
MicroSemi Libero Software Installation Problems rickman7 / 45Thu Nov 17, 2016 6:01 am rickman
Latch/flip flip without the use of process Karl3 / 39Fri Nov 11, 2016 10:51 am Karl
xc3sprog Andrew Rogers12 / 2298Wed Nov 09, 2016 10:55 pm Guest
cool science thing John Larkin1 / 44Thu Nov 03, 2016 9:31 pm John Larkin
Go to church this Sunday Rick C. Hodgin3 / 61Sat Oct 29, 2016 11:13 pm Rick C. Hodgin
Free timing diagram drawing software [ Goto pageGoto page: 1, 2, 3 ] Michael Chan30 / 416Wed Oct 26, 2016 10:47 pm Cecil Bayona
Platform Cable USB II in Windows 7 not Found (ISE 13.4) etantonio3 / 306Wed Oct 26, 2016 6:43 am Guest
verilog code Guest5 / 53Tue Oct 25, 2016 6:10 am Tim Wescott
EDK : FSL macros defined by Xilinx are wrong [ Goto pageGoto page: 1 ... 354, 355, 356 ] server5339 / 45567Mon Oct 24, 2016 9:06 pm rickman
entity component binding issue with configurations Marvin L3 / 39Mon Oct 24, 2016 3:58 am Marvin L
Your eternal soul is at stake Rick C. Hodgin5 / 51Sat Oct 22, 2016 4:33 pm Rick C. Hodgin
Too small to teach us about Christ? Rick C. Hodgin5 / 48Mon Oct 17, 2016 9:50 pm Tim Wescott
FPGA LABVIEW programming john8 / 161Sun Oct 16, 2016 8:10 pm Kevin Neilson
CORDIC in a land of built-in multipliers [ Goto pageGoto page: 1, 2 ] Tim Wescott28 / 92Sun Oct 16, 2016 8:05 pm Kevin Neilson
19 minutes to Life Rick C. Hodgin11 / 52Mon Oct 10, 2016 7:12 pm Tom Gardner
xilinx aurora lane order colin3 / 49Fri Oct 07, 2016 4:04 am Allan Herriman
How do I preserve Hazard safety terms? Johann Klammer8 / 63Thu Oct 06, 2016 10:49 pm rickman
Vivado HLS (C/C++/SystemC to ASIC/FPGA) Rick C. Hodgin1 / 49Thu Oct 06, 2016 4:34 pm Rick C. Hodgin
The Love of Jesus Christ is our Only Hope Rick C. Hodgin2 / 50Thu Oct 06, 2016 5:27 am Rick C. Hodgin
C to FPGA Rick C. Hodgin6 / 58Wed Oct 05, 2016 10:11 am Rick C. Hodgin
ANN: Amontec JTAGkey programs XC4VLX25 at 2.8s [ Goto pageGoto page: 1, 2 ] Amontec, Larry29 / 659Tue Oct 04, 2016 7:10 am Guest
learning verilog kristoff7 / 57Mon Oct 03, 2016 2:16 pm Tom Gardner
How badly was Jesus beaten? Rick C. Hodgin11 / 57Mon Oct 03, 2016 3:46 am Tim Wescott
Sharing a single Lookup Table Marvin L1 / 56Fri Sep 30, 2016 8:43 pm Kevin Neilson
requirement for PC for VHDL design [ Goto pageGoto page: 1, 2 ] kristoff27 / 122Wed Sep 28, 2016 8:43 am Theo Markettos
Why do we need Jesus? What if we're good people? Rick C. Hodgin5 / 49Tue Sep 27, 2016 1:42 am rickman
Minimal-operation shift-and-add (or subtract) [ Goto pageGoto page: 1, 2 ] Tim Wescott20 / 135Sun Sep 25, 2016 12:23 am Hul Tytus
Help me choose an FPGA to design network protocols PM X14 / 85Mon Sep 19, 2016 7:49 pm Guest
Why do I post about Jesus? Rick C. Hodgin2 / 57Mon Sep 19, 2016 3:44 pm Tom Gardner
Lattice JED File Formats and Device Type ID Code rickman3 / 61Thu Sep 15, 2016 3:02 am rickman
Ob Screen Display from video coming from OV7670 Guest3 / 71Wed Sep 14, 2016 5:40 pm Robert Walczyk
iCE40: I/O toggle rate, hard numbers needed Aleksandar Kuktin1 / 71Sun Sep 11, 2016 2:36 pm rickman

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