varun_agr
Guest
Thu Sep 15, 2011 6:52 am
Sir
When we run our vhdl programme it sysnthesize and implemented witout an
error, In place and route report it gives as:
Generating Clock Report
**************************
+---------------------+--------------+------+------+------------+-------------+
| Clock Net | Resource |Locked|Fanout|Net Skew(ns)|Ma
Delay(ns)|
+---------------------+--------------+------+------+------------+-------------+
| clk_BUFGP | BUFGMUX0P| No | 1886 | 0.280 | 1.257
|
+---------------------+--------------+------+------+------------+-------------+
| s_clk | BUFGMUX5S| No | 174 | 0.205 | 1.238
|
+---------------------+--------------+------+------+------------+-------------+
| hyperdis/h_clk | BUFGMUX2P| No | 38 | 0.273 | 1.250
|
+---------------------+--------------+------+------+------------+-------------+
| s_clk1 | Local| | 62 | 0.213 | 2.535
|
+---------------------+--------------+------+------+------------+-------------+
| trpcnt_cmp_eq0000 | Local| | 18 | 0.000 | 1.360
|
+---------------------+--------------+------+------+------------+-------------+
* Net Skew is the difference between the minimum and maximum routing
only delays for the net. Note this is different from Clock Skew which
is reported in TRCE timing report. Clock Skew is the difference between
the minimum and maximum path delays which includes logic delays.
Timing Score: 232989
INFO:Timing:2761 - N/A entries in the Constraints list may indicate tha
the constraint does not cover any paths or that it has no
requested value.
Asterisk (*) preceding a constraint indicates it was not met.
This may be due to a setup or hold violation.
------------------------------------------------------------------------------------------------------
Constraint | Check | Worst Case | Bes
Case | Timing | Timing
| | Slack
Achievable | Errors | Score
------------------------------------------------------------------------------------------------------
Autotimespec constraint for clock net clk | SETUP | N/A|
45.997ns| N/A| 0
_BUFGP | HOLD | 0.543ns|
| 0| 0
------------------------------------------------------------------------------------------------------
Autotimespec constraint for clock net hyp | SETUP | N/A|
20.484ns| N/A| 0
erdis/h_clk | HOLD | 0.658ns|
| 0| 0
------------------------------------------------------------------------------------------------------
* Autotimespec constraint for clock net s_c | SETUP | N/A|
11.313ns| N/A| 0
lk1 | HOLD | -2.837ns|
| 124| 232989
------------------------------------------------------------------------------------------------------
1 constraint not met.
INFO:Timing:2761 - N/A entries in the Constraints list may indicate tha
the
constraint does not cover any paths or that it has no requested value.
Generating Pad Report.
All signals are completely routed.
Sir I want to know what's meaning of 1 constraint not met and how I resolv
it.
Thanks
Varun
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