Clock Edge notation

Wed Jul 27, 2011 2:52 pm   

On 27/07/2011 13:36, hssig wrote:

As suggested earlier why don't you simply use vmake from Modelsim?

Vmake can be used without a valid license (just extract after running
the installer). Use vcom (also no valid license required) to compile
your design followed by running vmake.

You can now use any make program under windows (I use nmake from Visual
C++) to process it.

Vmake can also handle Verilog files but unfortunately not SystemC.

Good luck,

Hans
www.ht-lab.com

Thu Jul 28, 2011 9:15 am   

HT-Lab wrote:


The major difference of course between vmake and a program like vmk is that
vmake creates a makefile from already compiled libraries and that vmk
creates a makefile directly from the VHDL sources.

So for the initial compilation vmk must be used. Or manual compilation, and
optional use of the vcom option "-just eapbc" and wildcards for the VHDL
files. But that does not always work, for example if packages uses other
packages from the same library.

For keeping libraries up to date vmake might be more convenient to use.

I use both vmake and vmk.

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.

Thu Jul 28, 2011 2:32 pm   

Hi Hans,

do you have a real example to share in which you use vmake from
Modelsim ?


Cheers, Hssig

Fri Jul 29, 2011 7:58 am   

On 28/07/2011 13:32, hssig wrote:


If you have Modelsim installed then you can use one of their examples:

Navigate to ..\examples\tutorials\vhdl\basicSimulation, then execute

vlib work
vcom *.vhd
vmake > Makefile
nmake

modify one of the VHDL files and run nmake/make etc again. I would
recommend you have a quick look at the vmap command as well as you might
need it.

Good luck,

Hans.
www.ht-lab.com

Sat Jul 30, 2011 1:07 pm   

Hi Hans,

I have tried to run the example. But when typing "vmake > Makefile" I
get the error message:
# The vmake utility must be run from a Unix shell or a Windows/DOS
prompt.

I am using Modelsim PE 10.0b


Cheers, Hssig

Sat Jul 30, 2011 1:42 pm   

On Sat, 30 Jul 2011 04:07:57 -0700 (PDT), hssig <hssig_at_gmx.net> wrote:


Well, it's hard to see how the error message could be
any clearer :-)

Obviously you're running from within ModelSim's GUI, or Tcl
console. Fortunately Tcl comes to your rescue here:

exec vmake > Makefile

should do what you want. Of course, you *could* perhaps
RTFM and run vmake directly from the command prompt...

PS: exec is Tcl's command to run an external program. It does
a pretty good job of faking-up the environment to fool the
program into thinking it has been run from the DOS prompt.
--
Jonathan Bromley

Thu Aug 11, 2011 11:48 am   

Paul Uiterlinden <puiterl_at_notaimvalley.nl> writes:


Now that we're on the topic, what's a good make tool to use with vmake
on Windows? Gnu make included in Cygwin doesn't seem to like the
generated makefiles... I've been using make from unxutils, but it
seems to have a problem with time and imagines my files have a
modification time in the future and so on. It works, though.

Thu Aug 11, 2011 3:36 pm   

Anssi Saari <as_at_sci.fi> wrote:

Have you tried vmake's `-cygdrive' (IIRC) command line option?

Enrik

Fri Aug 12, 2011 8:28 am   

Enrik Berkhan <enrik.berkhan_at_inka.de> writes:


I take it that option is either new or non-existing? I'm using
Modelsim 6.5 and 6.6.

The specific error message from Gnu Make 3.81 in Cygwin is
Makefile:153: *** multiple target patterns. Stop.

On line 153 and onwards I have:

$(WORK__altera_tb) \
$(WORK__altera_tb__behavior) : altera_tb.vhd \
$(IEEE__std_logic_1164)
$(VCOM) -93 -O0 altera_tb.vhd

Anyways, looks like I stumbled on a working make:

GNU Make 3.82
Built for i386-pc-mingw32

I.e. the one included with mingw.

Fri Aug 12, 2011 10:26 am   

Anssi Saari wrote:


Sorry, I don't know. I don't use Windows.

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.

Fri Aug 12, 2011 3:52 pm   

On 12.08.11 10:28, wrote Anssi Saari:




regards,
Bart

Sat Aug 13, 2011 7:13 pm   

Anssi Saari <as_at_sci.fi> wrote:

I'm using an Altera Modelsim ASE OEM version, obviously based on 6.6d.
The header line in the generated Makefiles says 'vmake 2.2'.

$ vmake -h
Usage: vmake -help
vmake [-fullsrcpath] [-cygdrive] [-nolinewrap] [-f <filename>]
[-ignore <design_unit>] [-du <design_unit>] [<library>] [>
<makefile>

on Windows 7.

Without `-cygdrive', vmake genrates something like this:

....
LIB_IEEE = C:/altera/11.0/modelsim_ase/win32aloem/../ieee
....

This variable introduces the spurious colon in the rules when expanded,
leading to the error you described.

With `-cygdrive', the line reads:

....
LIB_IEEE = /cygdrive/c/altera/11.0/modelsim_ase/win32aloem/../ieee
....

and everything will work fine with make under Cygwin.

What vmake does not handle correctly though are path names containing
spaces.

Enrik

Mon Aug 15, 2011 1:04 pm   

Enrik Berkhan <enrik.berkhan_at_inka.de> writes:


OK. I only checked Modelsim 6.5, there was no -cygdrive there. But
yes, 6.6 has it. So, multiple solutions already. Thanks.

Sat Aug 20, 2011 3:50 pm   

Paul Uiterlinden <puiterl_at_notaimvalley.nl> writes:


Damn, it's a long time since I've been able to say that, even
professionally. At least documentation has in recent years been Wrod
always, even if real work was done in Linux.

You hiring?-)

Thu Aug 25, 2011 12:56 pm   

Anssi Saari wrote:


I pitty you.


Not personally.
You might check the WEB addres in my signature, although there are no direct
vacancies at the moment. And the location is the Netherlands. But I don't
see that as a problem. :-)

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.