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Carry Skip Adder implementation in verilog

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chitranna
Guest

Sun Apr 27, 2014 4:52 am   



I want to implement a carry skip adder in a 64 bit FPU in verilog.I am fairly new to verilog , and I have no idea how it works. What online material I find is a bit too complex for me to understand. Can anyone help with a sample code or how the adder works in general?

Nikolaos Kavvadias
Guest

Sun Apr 27, 2014 1:21 pm   



Τη Κυριακή, 27 Απριλίου 2014 5:52:59 π.μ. UTC+3, ο χρήστης chitranna έγραψε:
> I want to implement a carry skip adder in a 64 bit FPU in verilog.I am fairly new to verilog , and I have no idea how it works. What online material I find is a bit too complex for me to understand. Can anyone help with a sample code or how the adder works in general?

Hi I can help you.

I had implemented a 16-bit carry-skip (and a variable skip) adder in Verilog HDL (1995 version of the standard). This was around 1998-1999 and part of my B.Sc. thesis (Gosh, it's been some time). Let me know if this would be interesting to you.

Best regards
Nikolaos Kavvadias
http://www.nkavvadias.com

Nikolaos Kavvadias
Guest

Sun Apr 27, 2014 1:23 pm   



BTW I think i was reading chapters from a book by Swartzlander on computer arithmetic back then. Too hard to tell, i don't own this particular book (was at Uni. library) and this had been the previous millennium!

I own (among others) the old Cavanagh book on comparith; it is a rare (and great) quality! Already started to help me in my day job.


Best regards
Nikolaos Kavvadias
http://www.nkavvadias.com

a.h e.j
Guest

Wed May 28, 2014 6:17 pm   



hello chitranna

i know and i have this code just email me:
aejtahed10_at_gmail.com


Guest

Wed Mar 29, 2017 5:56 am   



On Sunday, April 27, 2014 at 8:22:59 AM UTC+5:30, chitranna wrote:
> I want to implement a carry skip adder in a 64 bit FPU in verilog.I am fairly new to verilog , and I have no idea how it works. What online material I find is a bit too complex for me to understand. Can anyone help with a sample code or how the adder works in general?

can u send me a carry skip adder verilog program for 8bits

rickman
Guest

Thu Mar 30, 2017 12:04 am   



On 3/28/2017 11:56 PM, ujjalsarkar696_at_gmail.com wrote:
Quote:
On Sunday, April 27, 2014 at 8:22:59 AM UTC+5:30, chitranna wrote:
I want to implement a carry skip adder in a 64 bit FPU in verilog.I am fairly new to verilog , and I have no idea how it works. What online material I find is a bit too complex for me to understand. Can anyone help with a sample code or how the adder works in general?

can u send me a carry skip adder verilog program for 8bits


I'm sure many people "can" send you such a program. But what do you
intend to *do* with it? Will you use it to benefit all mankind? Or
will you use it for evil purposes?

--

Rick C

Silicon Engineer
Guest

Mon Apr 03, 2017 7:28 pm   



ujjalsarkar696_at_gmail.com wrote:
Quote:
On Sunday, April 27, 2014 at 8:22:59 AM UTC+5:30, chitranna wrote:

I want to implement a carry skip adder in a 64 bit FPU in verilog.I am fairly new to verilog , and I have no idea how it works. What online material I find is a bit too complex for me to understand. Can anyone help with a sample code or how the adder works in general?


can u send me a carry skip adder verilog program for 8bits


Check: http://www.ijcst.com/vol61/1/13-Jasbir-Kaur.pdf

I am sure you could have Googled this.

Thanks,
SE

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