Merciadri Luca
Guest
Mon Nov 01, 2010 10:25 am
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Hi,
Can one write, e.g. in an architecture environment,
==
signal a, b, c: integer range 0 to 10
==
?
Thanks.
- --
Merciadri Luca
See
http://www.student.montefiore.ulg.ac.be/~merciadri/
- --
The greatest good you can do for another is not just share your riches, but reveal to him his own. (Benjamin Disraeli)
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Jonathan Bromley
Guest
Mon Nov 01, 2010 2:13 pm
On Nov 1, 9:25 am, Merciadri Luca wrote:
Quote:
Can one write, e.g. in an architecture environment,
=> signal a, b, c: integer range 0 to 10
=> ?
Yes, but wouldn't it be kinder to your readers
and reviewers if you write
subtype my_range is integer range 0 to 10;
signal a : my_range;
signal b : my_range;
signal c : my_range;
?
--
Jonathan Bromley
Merciadri Luca
Guest
Mon Nov 01, 2010 2:33 pm
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Jonathan Bromley <spam_at_oxfordbromley.plus.com> writes:
Quote:
On Nov 1, 9:25Â am, Merciadri Luca wrote:
Can one write, e.g. in an architecture environment,
==
signal a, b, c: integer range 0 to 10
==
?
Yes, but wouldn't it be kinder to your readers
and reviewers if you write
subtype my_range is integer range 0 to 10;
signal a : my_range;
signal b : my_range;
signal c : my_range;
Yes, exactly. Thanks for the tip.
- --
Merciadri Luca
See
http://www.student.montefiore.ulg.ac.be/~merciadri/
- --
When making your choices in life, do not forget to live. (Samuel Johnson)
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Andy
Guest
Mon Nov 01, 2010 4:00 pm
On Nov 1, 7:13 am, Jonathan Bromley <s...@oxfordbromley.plus.com>
wrote:
Quote:
On Nov 1, 9:25 am, Merciadri Luca wrote:
Can one write, e.g. in an architecture environment,
=> > signal a, b, c: integer range 0 to 10
=> > ?
Yes, but wouldn't it be kinder to your readers
and reviewers if you write
subtype my_range is integer range 0 to 10;
signal a : my_range;
signal b : my_range;
signal c : my_range;
?
--
Jonathan Bromley
Kindness to readers/reviewers is often not quite so simple.
If each signal declaration were followed by a comment about what the
signal was for (as I often do), I would whole-heartedly agree with
separate declarations.
If I'm trying to get the point across that all three are the same
type, that is communicated most effectively if they are declared in
the same statement. Of course, that does not mean that I would declare
all of my std_logic (or boolean) signals with one statement either.
For example, I very rarely use a dual-process (combinatorial &
clocked) representation, but when I do, I prefer to declare the
combinatorial and register signals in the same statement (with an end-
of-line comment that defines the data held by both, the names will
identify which is the reg).
Andy
