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Marwan Naji
Guest

Wed Sep 14, 2016 10:35 pm   



VHDL Group Project
Work in a group of three members design a dual-function digital timer using VHDL. The digital timer
can function as a stopwatch or a count-down timer. In the stopwatch mode, it is capable of recording
the time up to hundredths of a second accuracy. In the count-down mode, it is capable of counting down
from a maximum of 24 hours. It has three buttons (B1, B2 and B3) that are used to change the mode,
set the time, start and stop the stopwatch or the timer functions, and etc.
Pushing button B1 changes the mode from Stopwatch to Countdown Timer and back to Stopwatch.
The function of the buttons B2 and B3 vary depending on the mode and are explained in the following:
Operation in Stopwatch mode:
Display indicates stopwatch time in the format of mm:ss.cc (where cc is hundredths of a second).
Pressing B2 starts the time counter, pressing B2 again stops it, and then pressing B2 again will resume
the time counter and so on. Pressing B3 resets the time. Once the stopwatch is started, it will keep
running even when it is in the Countdown Timer mode.
Operation in Countdown Timer mode:
Display indicates the time in the format of hh:mm. Pushing B2 cycles the state to Set Hours, then to Set
Minutes, to start the timer, and to stop the timer. When in the Set Hours or Set Minutes state, each press
of B3 advances the hours and minutes by 1. Similarly, once the countdown timer is started, it will keep
running even when it is in the Stopwatch mode. In short, the dual function timer can run both operations
in parallel.
Assume that the system clock is at 50 MHz. You should try to include any of the concepts in designfor-test
and low power design techniques to improve the testability of the design, and better manage
the power consumption of your design, respectively

Rob Gaddi
Guest

Wed Sep 14, 2016 11:06 pm   



Marwan Naji wrote:

Quote:
VHDL Group Project
Work in a group of three members design a dual-function digital timer using VHDL. The digital timer
can function as a stopwatch or a count-down timer. In the stopwatch mode, it is capable of recording
the time up to hundredths of a second accuracy. In the count-down mode, it is capable of counting down
from a maximum of 24 hours. It has three buttons (B1, B2 and B3) that are used to change the mode,
set the time, start and stop the stopwatch or the timer functions, and etc.
Pushing button B1 changes the mode from Stopwatch to Countdown Timer and back to Stopwatch.
The function of the buttons B2 and B3 vary depending on the mode and are explained in the following:
Operation in Stopwatch mode:
Display indicates stopwatch time in the format of mm:ss.cc (where cc is hundredths of a second).
Pressing B2 starts the time counter, pressing B2 again stops it, and then pressing B2 again will resume
the time counter and so on. Pressing B3 resets the time. Once the stopwatch is started, it will keep
running even when it is in the Countdown Timer mode.
Operation in Countdown Timer mode:
Display indicates the time in the format of hh:mm. Pushing B2 cycles the state to Set Hours, then to Set
Minutes, to start the timer, and to stop the timer. When in the Set Hours or Set Minutes state, each press
of B3 advances the hours and minutes by 1. Similarly, once the countdown timer is started, it will keep
running even when it is in the Stopwatch mode. In short, the dual function timer can run both operations
in parallel.
Assume that the system clock is at 50 MHz. You should try to include any of the concepts in designfor-test
and low power design techniques to improve the testability of the design, and better manage
the power consumption of your design, respectively


I suggest you start by asking the other two members of your team.
Should none of you have any ideas on where to do go on this project, you
should then, collectively, ask your professor.

--
Rob Gaddi, Highland Technology -- www.highlandtechnology.com
Email address domain is currently out of order. See above to fix.

rickman
Guest

Thu Sep 15, 2016 3:04 am   



On 9/14/2016 4:35 PM, Marwan Naji wrote:
Quote:
VHDL Group Project
Work in a group of three members design a dual-function digital timer using VHDL. The digital timer
can function as a stopwatch or a count-down timer. In the stopwatch mode, it is capable of recording
the time up to hundredths of a second accuracy. In the count-down mode, it is capable of counting down
from a maximum of 24 hours. It has three buttons (B1, B2 and B3) that are used to change the mode,
set the time, start and stop the stopwatch or the timer functions, and etc.
Pushing button B1 changes the mode from Stopwatch to Countdown Timer and back to Stopwatch.
The function of the buttons B2 and B3 vary depending on the mode and are explained in the following:
Operation in Stopwatch mode:
Display indicates stopwatch time in the format of mm:ss.cc (where cc is hundredths of a second).
Pressing B2 starts the time counter, pressing B2 again stops it, and then pressing B2 again will resume
the time counter and so on. Pressing B3 resets the time. Once the stopwatch is started, it will keep
running even when it is in the Countdown Timer mode.
Operation in Countdown Timer mode:
Display indicates the time in the format of hh:mm. Pushing B2 cycles the state to Set Hours, then to Set
Minutes, to start the timer, and to stop the timer. When in the Set Hours or Set Minutes state, each press
of B3 advances the hours and minutes by 1. Similarly, once the countdown timer is started, it will keep
running even when it is in the Stopwatch mode. In short, the dual function timer can run both operations
in parallel.
Assume that the system clock is at 50 MHz. You should try to include any of the concepts in designfor-test
and low power design techniques to improve the testability of the design, and better manage
the power consumption of your design, respectively


This looks like a pretty complete set of requirements. What do you need
help with?

--

Rick C

GaborSzakacs
Guest

Fri Sep 16, 2016 12:26 am   



Marwan Naji wrote:
Quote:
VHDL Group Project
Work in a group of three members design a dual-function digital timer using VHDL. The digital timer
can function as a stopwatch or a count-down timer. In the stopwatch mode, it is capable of recording
the time up to hundredths of a second accuracy. In the count-down mode, it is capable of counting down
from a maximum of 24 hours. It has three buttons (B1, B2 and B3) that are used to change the mode,
set the time, start and stop the stopwatch or the timer functions, and etc.
Pushing button B1 changes the mode from Stopwatch to Countdown Timer and back to Stopwatch.
The function of the buttons B2 and B3 vary depending on the mode and are explained in the following:
Operation in Stopwatch mode:
Display indicates stopwatch time in the format of mm:ss.cc (where cc is hundredths of a second).
Pressing B2 starts the time counter, pressing B2 again stops it, and then pressing B2 again will resume
the time counter and so on. Pressing B3 resets the time. Once the stopwatch is started, it will keep
running even when it is in the Countdown Timer mode.
Operation in Countdown Timer mode:
Display indicates the time in the format of hh:mm. Pushing B2 cycles the state to Set Hours, then to Set
Minutes, to start the timer, and to stop the timer. When in the Set Hours or Set Minutes state, each press
of B3 advances the hours and minutes by 1. Similarly, once the countdown timer is started, it will keep
running even when it is in the Stopwatch mode. In short, the dual function timer can run both operations
in parallel.
Assume that the system clock is at 50 MHz. You should try to include any of the concepts in designfor-test
and low power design techniques to improve the testability of the design, and better manage
the power consumption of your design, respectively


My suggestion is to break the project into three parts, and assign
one team member to design each part. This will help you learn how
to work in a design team as well as how to design logic.

One possible way to partition the design is:

1) Down counter

2) Stop watch

3) Button debounce and display (top level)

Then you need to agree on the interface to use between these design
partitions so that each team member can design and test their part
against the interface requirements, and if all goes well the parts
will match up and work.

--
Gabor

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