can any one help me in VHDL codes plz

Wed Jul 06, 2011 9:51 am   

hi all,

really i want a help in these 2 problems :

1)
I want a structural VHDL code of 1 to 16 Demultiplexers. with an
active low Enable signal using 1 to 2 Demultiplexer. [ use Generate
statement]

__________________________________________________ ____________
2)
Also I need a structure and behavior VHDL code of 5-bits binary
counter with a synchronous load signal to preset the counter to a
specific initial state. the output of the counter ( Q0 to Q4) are
connected to a binary decoder that shows the state of the counter.

Wed Jul 06, 2011 3:06 pm   

Wheres the problem? Looks like a set of exercises you havent started
yet.

Or is the problem you're too lazy to do it yourself?

On Jul 6, 8:51 am, majmoat_ensan <majmoat_en...@windowslive.com>
wrote:

Thu Jul 07, 2011 1:10 am   

On Jul 6, 3:51 am, majmoat_ensan <majmoat_en...@windowslive.com>
wrote:

What have you tried so far?
What were the results?
If you're just fishing for homework help, try a different pond where
somebody must be silly enough to bite.

KJ